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[Applications] crc8

Description: 8位CRC源代码-eight CRC source code
Platform: | Size: 2048 | Author: 李陵 | Hits:

[Applications] crc_verilog

Description: 用于计算CRC的verilog HDL源码-CRC calculation for the Verilog HDL source
Platform: | Size: 10240 | Author: 刘波 | Hits:

[VHDL-FPGA-Verilog] 结合XILINXCPLD RS232通信(verilog)

Description: 结合XILINXCPLD所做的模拟RS232通信verilog源程序-XILINXCPLD combine the simulation RS232 communication Verilog source
Platform: | Size: 121856 | Author: 于飞 | Hits:

[VHDL-FPGA-Verilog] CRC校验参考设计_xilinx_verilog

Description: IEEE 802.3 Cyclic Redundancy Check参考设计，xilinx提供-IEEE 802.3 Cyclic Redundancy Check reference design for Xilinx
Platform: | Size: 90112 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilog] pcm_verilog

Description: 这是PCM电话传输系统模型的verilog程序,是一个modlesim开发环境下的工程文件,并有波形仿真结果.-PCM telephone transmission system Verilog model of procedures is a modlesim development environment under the project documents, and a waveform simulation results.
Platform: | Size: 47104 | Author: way | Hits:

[VHDL-FPGA-Verilog] crc3321

Description: CRC循环校验码的VERILOG源文件，在MODELSIM下的一个工程。-Cyclic Check Code VERILOG source, the MODELSIM of a project.
Platform: | Size: 26624 | Author: 刘仪 | Hits:

[VHDL-FPGA-Verilog] crc_verilog_xilinx

Description: crc校验，非常好用，是从Xilinx的IP演化来的-crc脨 拢 脩茅 拢 卢 脟 鲁 拢 潞 脙脫脙 拢 卢 脢脟
Platform: | Size: 10240 | Author: zl | Hits:

[VHDL-FPGA-Verilog] Serial_CRC

Description: CRC校验串行实现方法,verilog源码,利用反馈线性移位寄存器的方法,实现简单,适用于串行通信协议中的CRC校验.-CRC checksum method of serial realize, verilog source code, the use of linear feedback shift register method, the realization of simple serial communication protocol for the CRC checksum.
Platform: | Size: 1024 | Author: 徐亮 | Hits:

[VHDL-FPGA-Verilog] crc_verilog

Description: 循环码编码器verilog实现，里面包含有源程序和仿真图。-Cyclic code encoder Verilog realization, which contains the source code and simulation of Fig.
Platform: | Size: 15360 | Author: 萍果 | Hits:

[VHDL-FPGA-Verilog] CRC32

Description: VHDL CRC32 VHDL CRC32
Platform: | Size: 1714176 | Author: easyboy | Hits:

[VHDL-FPGA-Verilog] CRC_16

Description: crc16的串行和并行写法，而且有详细的测试文件-Serial and parallel crc16 written, and detailed test documents
Platform: | Size: 20480 | Author: Jammy | Hits:

[VHDL-FPGA-Verilog] CRC_32

Description: 用verilog语言实现的的的32位CRC生成与检验的代码-The 32bits CRC using hardware describe language of verilog
Platform: | Size: 1024 | Author: 朱猪 | Hits:

[VHDL-FPGA-Verilog] HDLC

Description: verilog HDL语言编写的HDLC协议的IP核，包括通讯控制及CRC。-written in verilog HDL HDLC protocol IP core, including communications control and CRC.
Platform: | Size: 69632 | Author: 王强 | Hits:

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