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[OtherHotPower_CRC_PEC

Description: 通用CRC/PEC的8~64位计算器(内含菜农自创的CRC加密和解密技术)-GM CRC/PEC of 8 ~ 64 calculator (includes vegetable own encryption and decryption of the CRC Technology)
Platform: | Size: 5120 | Author: 雁塔菜农 | Hits:

[Crack Hackcrc5-8

Description: CRC5循环校验法代码生成,数据校验,数据纠错等功能函数代码-Check Act cycle CRC5 code generation, data checking, data error correction code such as function
Platform: | Size: 2048 | Author: hh | Hits:

[AlgorithmCRC

Description: 数组为8位char型数值,通过该函数可以计算出数组的16位循环校验码。-Array for the 8-bit char type values can be calculated through the function of an array of 16 cycle parity-check codes.
Platform: | Size: 15360 | Author: 刘中 | Hits:

[Othercrc

Description: 计算达拉斯8位校验码的工具软件,内部使用死循环,要退出时按Ctrl+C,过程中要归零可输入与上次结果相同的数,DOS窗口,输入的数为单字节的十六进制数即00-FF。-Dallas 8 Checksum calculation tool code software, the internal use of the death cycle, and when to withdraw from the Ctrl+ C, the process to zero can be input with the previous results of the same number, DOS window, enter the number of ten single-byte six hexadecimal number that is 00-FF.
Platform: | Size: 6144 | Author: 侯文波 | Hits:

[OtherVBCRC

Description:   循环冗余码校验英文名称为Cyclical Redundancy Check,简称CRC。它是利用除法及余数的原理来作错误侦测(Error Detecting)的。实际应用时,发送装置计算出CRC值并随数据一同发送给接收装置,接收装置对收到的数据重新计算CRC并与收到的CRC相比较,若两个CRC值不同,则说明数据通讯出现错误。 根据应用环境与习惯的不同,CRC又可分为以下几种标准:   ①CRC-12码;   ②CRC-16码;   ③CRC-CCITT码;   ④CRC-32码。   CRC-12码通常用来传送6-bit字符串。CRC-16及CRC-CCITT码则用是来传送8-bit字符,其中CRC-16为美国采用,而CRC-CCITT为欧洲国家所采用。CRC-32码大都被采用在一种称为Point-to-Point的同步传输中。 下面以最常用的CRC-16为例来说明其生成过程。-err
Platform: | Size: 3072 | Author: qizhiwei | Hits:

[AlgorithmCRC_8_16_32_CALC

Description:
Platform: | Size: 40960 | Author: 云飞 | Hits:

[Bookscrc_explain

Description: 8CRC,16CRC,32CRC的原理 -8CRC, 16CRC, 32CRC Principle
Platform: | Size: 106496 | Author: 邵里强 | Hits:

[VHDL-FPGA-Verilogcrc_verilog_xilinx

Description: CRC,对于研究通信的有重要意义.利用VERILOG实现8位,16位等CRC原理,-CRC, the study of communication are important. VERILOG to achieve the use of 8, 16, such as CRC principle,
Platform: | Size: 10240 | Author: | Hits:

[VHDL-FPGA-Verilogtrunk-hdlc

Description: 高级链路层协议的实现,vhdl,fpga-- 8 bit parallel backend interface - use external RX and TX clocks - Start and end of frame pattern generation - Start and end of frame pattern checking - Idle pattern generation and detection (all ones) - Idle pattern is assumed only after the end of a frame which is signaled by an abort signal - Zero insertion - Abort pattern generation and checking - Address insertion and detection by software - CRC generation and checking (Optional, external, since CRC-16 or CRC-32 can be used) - FIFO buffers and synchronization (External) - Byte aligned data (if data is not aligned to 8-bits extra random bits are inserted) - Q.921, LAPB and LAPD compliant. - For complete specifications refer to spec document
Platform: | Size: 188416 | Author: | Hits:

[Algorithmcrcasm.asm

Description: 8 bit very fast CRC generator for polynom x8+x2+x1+x (0x07), fits any AVR processor and any type of 8-bit data trasfer with 8 bit CRC code written in AVR assembler with AVRStudio 4. Author: Jens Hallgren, Sweden-8 bit very fast CRC generator for polynom x8+x2+x1+x (0x07), fits any AVR processor and any type of 8-bit data trasfer with 8 bit CRC code written in AVR assembler with AVRStudio 4. Author: Jens Hallgren, Sweden
Platform: | Size: 1024 | Author: jens | Hits:

[Crack HackCRC8_asm

Description: CRC-8 with lookup table in assemble code. Fast but bigger.
Platform: | Size: 2048 | Author: none | Hits:

[Sniffer Package captureMyFramer

Description: Ethernet帧的封装与解析 帧的封装:用户输入任意一段信息,以回车作为结束。然后程序将这段信息作为帧的数据字段封装到数据帧中。并相应填充帧的其他字段。 帧的解析:从用户输入的文件中读取帧,并对其进行解析。通过重新计算CRC-8校验和,判断该帧是否会被接受。最终在终端输出帧的相关信息。 -Ethernet Frame CRC-8
Platform: | Size: 783360 | Author: wangweizhao | Hits:

[Crack HackCRC

Description: CRC校验算法(包含8位16位32位),内有详细中文注释,以及含有某系列单片机的CRC的汇编代码!-CRC checksum algorithm (with 8-bit 16-bit 32-bit), which detailed English notes, and contains a CRC of a series of microcontroller assembly code!
Platform: | Size: 134144 | Author: 郑生 | Hits:

[VHDL-FPGA-Verilogcrc8

Description: 8位crc的verilog设计 通过仿真综合验证并已应用在工程里面 -verilog of 8bit error checkout
Platform: | Size: 1024 | Author: yangyanwen | Hits:

[VHDL-FPGA-Verilogcrc_verilog_xilinx

Description: 各类CRC效验码 有CRC8-8 CRC16-8 CRC32-8 CRC12-4 CRC-CCIT-8-CONTAIN CRC8-8 CRC16-8 CRC32-8 CRC12-4 CRC-CCIT-8
Platform: | Size: 6144 | Author: 吴伟珍 | Hits:

[SCMCrc

Description: CRC校验8位16位32位全面方便的源码-8-bit 16-bit CRC, a comprehensive and convenient source 32-bit
Platform: | Size: 1024 | Author: | Hits:

[Windows Developcrc

Description: 实现简单的crc校验,校验码为8位,程序简单易懂,适合新手学习,结果以十六进制形式表述-Achieve a simple crc check, check for the 8-bit code, the program easy to understand for novices to learn the results expressed in hexadecimal
Platform: | Size: 195584 | Author: 陈亮 | Hits:

[SCMCRC8-16

Description: CRC校验的相关原理以及CRC-8和CRC-16的C语言实现。-The relevant principles of the CRC and the CRC-8 and CRC-16 of the C language.
Platform: | Size: 62464 | Author: 刘世生 | Hits:

[SCMCRC-485communication-program

Description: 通讯规则: 1:时钟7.3728 MHz/波特率9600/9个数据位/奇校验/1个停止位/硬件多机通讯功能/ 2:通讯连接采用硬件MAX485,双向单工 -Communication rules: 1: clock 7.3728 MHz/9600 baud/8 data bits/odd parity/1 stop bit/hardware, multi-machine communication/2: Communication connection using hardware MAX485, two-way simplex
Platform: | Size: 4096 | Author: lijian | Hits:

[CommunicationCRC8_Dev

Description: 多项式为g(x)=x8+x5+x4+1的CRC-8 检验开发.绝对正确且易懂-Polynomial g (x) = x8+ x5+ x4+1 of the CRC-8 test development. Absolutely correct and easy to understand
Platform: | Size: 3072 | Author: yeyonglu | Hits:
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