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Description: MAC-4bit verilog source code with CSA style
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Size: 2048 |
Author: bulbul1225 |
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Description: DVB 加扰软件,对TS流文件进行加扰,符合DVB标准-it s a dvb scramble software . it can scrambling ts stream file ,which apply for dvb standards
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Size: 80896 |
Author: 19869142 |
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Description: This common interview question ask about verilog-This is common interview question ask about verilog
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Size: 10240 |
Author: Hank |
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Description: CSA加扰算法verilog实现,代码经过fpga验证,可以正确实现该算法。-CSA verilog rtl codeing
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Size: 34816 |
Author: he |
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Description: csa 16 bit verilog code with less delay
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Size: 62464 |
Author: raja |
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Description: A Carry Select Adder.
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Size: 10240 |
Author: ax3ghazy
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Description: 32-bit new carry select adder verilog code
Platform: |
Size: 1236 |
Author: gsrwork2017@gmail.com |
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