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Description: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机（CORDIC）算法实现了一个FFT实时谱分析系统。整个设计采用流水线工作方式，保证了系统的速度，避免了瓶劲的出现；整个系统采用FPGA实现，实验表明，该系统既有DSP器件实现的灵活性又有专用FFT芯片实现的高速数据吞吐能力，可以广泛地应用于数字信号处理的各个领域。-time selected by using the in-situ-4 algorithm and coordinate rotation digital computer (CORDIC) algorithm is is a real-time FFT spectrum analysis system. The whole design flow work, to make sure that the speed of the system is to avoid the emergence of fresh bottle; the entire system using FPGA, the experiments show that The system established DSP device with the flexibility of dedicated FFT chips to achieve high-speed data throughput. can be widely applied to the digital signal processing in various fields.
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Size: 390425 |
Author: yaoming |
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Description: This simulation exercise explores the impact of MAC overhead and multiple hops on achievable data throughput in a wireless network.
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Size: 5953 |
Author: 何星 |
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Description: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机（CORDIC）算法实现了一个FFT实时谱分析系统。整个设计采用流水线工作方式，保证了系统的速度，避免了瓶劲的出现；整个系统采用FPGA实现，实验表明，该系统既有DSP器件实现的灵活性又有专用FFT芯片实现的高速数据吞吐能力，可以广泛地应用于数字信号处理的各个领域。-time selected by using the in-situ-4 algorithm and coordinate rotation digital computer (CORDIC) algorithm is is a real-time FFT spectrum analysis system. The whole design flow work, to make sure that the speed of the system is to avoid the emergence of fresh bottle; the entire system using FPGA, the experiments show that The system established DSP device with the flexibility of dedicated FFT chips to achieve high-speed data throughput. can be widely applied to the digital signal processing in various fields.
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Size: 390144 |
Author: yaoming |
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Description: DM642上的DMA性能一个简单的介绍和分析。
DM642中的DMA称为EDMA（Enhanced Direct Memory Access）,其EDMA控制器支持64个相互独立的DMA通道，每个通道都可以接受系统外设事件的触发或者CPU的指令的触发，不同DMA传输之间还可以进行连接，构成各种复杂的DMA操作，在600MHz主频时可以提供2.4GB/秒的数据吞吐量。具备的1维、2维传输模式，非常适合图像的处理。
-DMA performance on the DM642 a brief introduction and analysis. DM642 The DMA called EDMA (Enhanced Direct Memory Access), the EDMA controller to support 64 independent DMA channels, each channel would be acceptable to all system peripherals, or trigger events trigger CPU instructions, different DMA transmission of can also be used for inter-connections, constitute a complex DMA operation, in the 600MHz frequency can provide 2.4GB/s data throughput. With the 1-dimensional, 2-dimensional transport model, very suitable for image processing.
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Size: 6144 |
Author: 色度 |
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Description: This simulation exercise explores the impact of MAC overhead and multiple hops on achievable data throughput in a wireless network. -This simulation exercise explores the impact of MAC overhead and multiple hops on achievable data throughput in a wireless network.
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Size: 6144 |
Author: 何星 |
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Description: Ultra wideband (UWB) technology, well-known for its use in ground penetrating
radar, has also been of considerable interest in communications and radar applications
demanding low probability of intercept and detection (LPI/D), multipath immunity, high
data throughput, precision ranging and localization.-Ultra wideband (UWB) technology, well-known for its use in ground penetratingradar, has also been of considerable interest in communications and radar applicationsdemanding low probability of intercept and detection (LPI/D), multipath immunity, highdata throughput, precision ranging and localization .
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Size: 36864 |
Author: Frank |
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Description: Ultra wideband (UWB) technology, well-known for its use in ground penetrating
radar, has also been of considerable interest in communications and radar applications
demanding low probability of intercept and detection (LPI/D), multipath immunity, high
data throughput, precision ranging and localization.-Ultra wideband (UWB) technology, well-known for its use in ground penetratingradar, has also been of considerable interest in communications and radar applicationsdemanding low probability of intercept and detection (LPI/D), multipath immunity, highdata throughput, precision ranging and localization .
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Size: 635904 |
Author: Frank |
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Description: ATmega8是基于增强的AVR RISC结构的低功耗8位CMOS微控制器。由于其先进的指令
集以及单时钟周期指令执行时间， ATmega8 的数据吞吐率高达1 MIPS/MHz，从而可以
缓减系统在功耗和处理速度之间的矛盾。-ATmega8 is based on the AVR RISC structure of the enhanced low-power 8-bit CMOS microcontroller. Because of its advanced instruction set, as well as a single clock cycle instruction execution time, ATmega8 data throughput of up to 1 MIPS/MHz, which can reduce system power consumption and processing speed at the contradiction between.
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Size: 9225216 |
Author: 伊兹蜜 |
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Description: 在ns模拟结束后利用其自带的AWK工具分析所得TRACE文件所用的脚本文档 可分析吞吐量 丢包数目等数据 并生成相应文档输出-Ns simulation at the end of use of its own analysis of the TRACE instrument AWK paper documents can be used in script analysis of the number of data throughput of packet loss and generates corresponding output files
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Size: 1024 |
Author: 凌峰 |
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Description: 基于MATLAB的组合模型
在港口吞吐量预测中的应用
以某港1998--2007年集装箱吞吐量为实测数据，建立其集装箱吞吐量的灰色理论、三次指数平滑、三次多项式
等预测模型，在MATLAB下，对比该港集装箱吞吐量各模型预测拟合值与实际值的差异。分析了差异产生的原因及其单一预
测模型的局限性，提出了港口集装箱吞吐量组合预测法。其预测误差明显低于其它单模型。运用组合预测模型．可以降低误
差。提高预测精度。-A combination of MATLAB-based model in port throughput prediction of a Hong Kong 1998- 2007 container throughput for the measured data, the establishment of its container throughput of the gray theory, the three exponential smoothing, prediction models, such as cubic polynomial in MATLAB, the contrast of the Hong Kong container throughput of fitting the models to predict the value of the difference between the actual value. Analysis of the causes of differences and the limitations of a single prediction model, the combination of port container throughput prediction. Its prediction error was significantly lower than other single model. The use of combination forecasting model. Can reduce the error. Improve the prediction accuracy.
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Size: 148480 |
Author: 张学利 |
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Description: THROUGHPUT OPTIMIZATION
FOR WIRELESS DATA TRANSMISSION
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Size: 247808 |
Author: meriem |
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Description: 基于ice网络通讯库的测试demo，支持各种自定义数据类型的传送和效率测试。-Ice network communication library based on the test demo, support a variety of custom data types and efficiency of the transmission test.
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Size: 3424256 |
Author: idealpu |
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Description: A Multi-Gigabit Transceiver (MGT) is a SerDes capable of operating at serial bit rates above 1 Gigabit/second. MGTs are used increasingly for data communications because they can run over longer distances, use fewer wires, and thus have lower costs than parallel interfaces with equivalent data throughput.
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Size: 466944 |
Author: cidadeus |
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Description: 在Winsock i/o 模型中CPIO无疑是性能最好的，当然高性能是耗费系统可观的资源作代价的，在多连接和高数据吞吐率方面要求高的应用中才会用此模型，所以我认为不要盲目地使用此模型。
在具体应用中只要继承此类然后重写其中的几个虚函数即可，要注意的几点是：1，CPIO用到多线称，所以对有些资源必须同步2，在数据收发当中会平凡分配和释放内存资源，这种平凡的资源分配和释放回消耗系统一定的资源，所以可以用一种方法尽量减少这种操作，此类中用到了“内存池“-In the Winsock i/o model CPIO is undoubtedly the best performance, of course, is the cost high-performance system, the cost of considerable resources, in many aspects of connectivity and high data throughput applications that require high will use this model, so I Do not blindly believe that using this model. In specific applications such as long as the inheritance and then override a few virtual functions which can be, points to note are: 1, CPIO use multi-line said, so some resources must be synchronized 2, which would be unusual in the data transceiver allocate and free memory resources, this extraordinary resource allocation and released back consume some resources, so you can minimize this with a ways of minimizing the operation of this class are depleted, " Neicun pool"
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Size: 6144 |
Author: xiaofeng |
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Description: The DVI Adaptive Differential Pulse Code Modulation (ADPCM) algorithm was first described in an IMA recommendation on audio formats and conversion practices [1]. ADPCM is a transformation that encodes 16-bit audio as 4 bits (a 4:1 compression ratio). In order to achieve this level of compression, the algorithm maintains an adaptive value predictor, which uses the distance between previous samples to store the most likely value of the next sample. The difference between samples is quantized down to a new sample using an adaptive step-size. The algorithm in [1] suggests using a table to adapt this step-size to the analyzed data. ADPCM has become widely used and adapted, and a variant of the algorithm performs voice encoding on cellular phones (allowing minimal data to be sent across the wireless network and increasing throughput).
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Size: 439296 |
Author: stefanescul |
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Description: 8-bit Digital I/O Module with RS-485 Interface.
This chip uses a slightly larger PIC (16C63A) so it has more RAM for a bigger packet buffer. This chip has a 128 byte buffer so long text strings can be sent to it for printing on a printer or any other device connected to it. Note that this chip also has a BUSY input (in addition to the STROBE line) so full handshaking with the printer is possible, improving the data throughput (Approx 8000 chars/sec).-8-bit Digital I/O Module with RS-485 Interface.
This chip uses a slightly larger PIC (16C63A) so it has more RAM for a bigger packet buffer. This chip has a 128 byte buffer so long text strings can be sent to it for printing on a printer or any other device connected to it. Note that this chip also has a BUSY input (in addition to the STROBE line) so full handshaking with the printer is possible, improving the data throughput (Approx 8000 chars/sec).
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Size: 406528 |
Author: sasa |
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Description: 柯支亨老师的《ns2仿真实验》第三章实验部分，如何建立tcp，udp联机，并分析它们各自的数据吞吐量，抖动率等。-Heng Ke support teacher " ns2 simulation experiments," Chapter III experiment, how to build tcp, udp online, and to analyze their own data throughput, jitter rate.
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Size: 4096 |
Author: 杜少波 |
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Description: 实现不同的TCP版本：TCP NewReno与TCP Sack对各应用数据流的吞吐量，丢包，时延的影响和优劣。-Implement different versions of TCP: TCP NewReno and TCP Sack flow for each application data throughput, packet loss, delay effects and pros and cons.
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Size: 1024 |
Author: 杜少波 |
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Description: 作为一种RISC体系结构的微处理器，ARM微处理器具有RISC体系结构的典型特征。还具有如下增强特点： (l)在每条数据处理指令当中，都控制算术逻辑单元(ALU)和移位器，以使ALU和移位器获得最大的利用率； (2)自动递增和自动递减的寻址模式，以优化程序中的循环； (3)同时Load和Store多条指令，以增加数据吞吐量； (4)所有指令都条件执行，以增大执行吞吐量
-As a RISC microprocessor architecture, ARM RISC microprocessor architecture with typical characteristics. Also has the following enhanced features: (l) in which each data processing instructions, all the control arithmetic logic unit (ALU) and the shifter, ALU and shifter in order to maximize efficiency (2) auto-increment and auto- decrement addressing modes, to optimize the program cycle (3) Load and Store multiple instructions simultaneously to increase data throughput (4) conditional execution of all instructions in order to increase the execution throughput
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Size: 173056 |
Author: yuyu |
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Description: ATmega32是基于增强的AVR RISC结构的低功耗8 位CMOS微控制器。由于其先进的指
令集以及单时钟周期指令执行时间，ATmega32 的数据吞吐率高达1 MIPS/MHz，从而可
以缓减系统在功耗和处理速度之间的矛盾。-ATmega32 AVR RISC-based structure of the enhanced low-power CMOS 8-bit micro-controller. Because of its advanced set of instructions in a single clock cycle instruction execution time, ATmega32 data throughput of up to 1 MIPS/MHz, which can optimize power consumption versus processing speed of the conflict.
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Size: 2247680 |
Author: 吴钟海 |
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