Search - dds signal generator vhdl

[Communication-Mobile] EXPT12_10_PHAS_PLL1

Description: VHDL 实现DDS的数字移相信号发生器的设计代码.直接解压打开就可以运行..自己写的代码-VHDL shifter DDS signal generator design code. Directly extract can run on open .. write their own code
Platform: | Size: 119808 | Author: haiou | Hits:

[VHDL-FPGA-Verilog] DDS_VHDL_xzy

Description: 在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器，芯片是Altera公司的-in EDA software development QuartusII use VHDL DDS signal generator , chip companies are Altera
Platform: | Size: 4760576 | Author: xiaoyong | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: vhdl的一些源代码，包括dds 设计，交通灯设计，信号发生器设计的一些源代码-Some of VHDL source code, including dds design, traffic signal design, signal generator designed a number of source code
Platform: | Size: 70656 | Author: 马斌 | Hits:

[VHDL-FPGA-Verilog] ddswase

Description: dds信号发生器，可以产生任意频率的正弦波，发波和谐波.已经编译通过-dds signal generator, can generate any frequency of the sine wave, the waves and harmonics. has been compiled through
Platform: | Size: 2048 | Author: | Hits:

[Other Embeded program] DDS

Description: 基于DDS的数字移相正弦信号发生器设计，EDA技术在全国大学生电子设计竞赛中的应用-DDS-based digital phase-shifting sinusoidal signal generator design, EDA Technology in the National Undergraduate Electronic Design Contest Application
Platform: | Size: 222208 | Author: Alex | Hits:

[VHDL-FPGA-Verilog] ddsyixiang

Description: dds数字移相信号发生器,功能齐全通过验证-dds digital shift Signal Generator, full-featured validated
Platform: | Size: 1720320 | Author: 刘明吉 | Hits:

[Software Engineering] DDS

Description: 基于DDS原理的正弦信号发生器。用VERILOG语言实现，功能强大。-DDS based on the principle of sinusoidal signal generator. Using Verilog language and powerful.
Platform: | Size: 558080 | Author: 毛华站 | Hits:

[VHDL-FPGA-Verilog] sin125

Description: 用FPGA实现DDS的信号发生器（正弦波125kHz）-Using FPGA to achieve DDS signal generator (sine wave 125kHz)
Platform: | Size: 196608 | Author: 杜海明 | Hits:

[VHDL-FPGA-Verilog] vhdldds0000

Description: 采用fpga的hdl语言实现dds的信号发生器的设计，性能与传统相比明显提高。-Hdl language using FPGA implementation of the signal generator dds design, performance markedly improved compared with the traditional.
Platform: | Size: 172032 | Author: 李江 | Hits:

[Software Engineering] DDS

Description: 本设计基于数字频率合成技术,采用正弦查找表实现波形产生.直接数字频率合成技术（DDS）是一种先进的电路结构，能在全数字下对输出信号频率进行精确而快速的控制，DDS技术还在解决输出信号频率增量选择方面具有很好的应用，DDS所产生的信号具有频率分辨率高、频率切换速度快、频率切换时相位连续、输出相位噪声低和可以产生任意波形等诸多优点。文中介绍了DDS的基本原理，对DDS的质谱及其散杂抑制进行了分析。程序设计采用超高速硬件描述语言VHDL描述DDS,在此基础上设计了正弦波、三角波、方波等信号发生器，。完成了软件和硬件的设计，以及实验样机的部分调试。 -The design is based on a digital frequency synthesis technology, to achieve wave synthesis by sine wave look-up tables. Direct Digital Synthesis Technology (DDS) is an advanced circuit structure, the output signal frequency is controlled precisely and rapidly in all-digital process, DDS technology has been applied in output signal frequency increment. DDS signals generated own high frequency resolution, frequency switching speed and continuous phase when frequency switching, low-output phase noise and can generate arbitrary waveform, and so on. Basic principles of the DDS is introduced in the paper, frequency form and stray inhabitation of the DDS is analyzed. Procedures designed with high-speed hardware description language VHDL describe DDS, and design a sine wave, triangle wave, square-wave signal generator by it.The hardware and software has been designed, prototype and circuit has been tested partly.
Platform: | Size: 312320 | Author: 蓝 | Hits:

[Other Embeded program] AD9854

Description: AT89C52控制AD9854的DDS信号发生器程序其中包括各种分类子程序-AT89C52 control of the DDS signal generator AD9854 including various classification procedures Subroutine
Platform: | Size: 6144 | Author: zebftu | Hits:

[Other] EP1C3_12_10_PHAS

Description: 基于FPGA的移相式DDS正弦信号发生器的VHDL源代码，压缩包里是在Quartus里做的工程，FPGA用的是Cyclone1C3系列-FPGA-based phase-shifting of the DDS signal generator sine VHDL source code, compressed in the bag is done in Quartus Engineering, FPGA is used Cyclone1C3 Series
Platform: | Size: 49152 | Author: deadtomb | Hits:

[Software Engineering] sji

Description: 频率合成技术在现代电子技术中具有重要的地位。在通信、雷达和导航等设备中，它可以作为干扰信号发生器；在测试设备中，可作为标准信号源，因此频率合成器被人们称为许多电子系统的“心脏”。直接数字频率合成（DDS——Digital Direct Frequency Synthesis）技术是一种全新的频率合成方法，是频率合成技术的一次革命。本文主要分析了DDS的基本原理及其输出频谱特点，并采用VHDL语言在FPGA上实现。对于DDS的输出频谱，一个较大的缺点是：输出杂散较大。针对这一缺点本文使用了两个方法加以解决。首先是压缩ROM查找表，-Abstract；The frequency synthesis technology has the important status in the modern electronic technology. In equipment such as correspondence, radar and navigation, it may work as the unwanted signal generator In the test facility, may work as the standard signal source, therefore the frequency synthesizer is called by the people as "the heart" of many electronic systems .DDS——Digital Direct Frequency Synthesis technology is one brand-new frequency synthetic method, is a frequency synthesis technology revolution. This paper analyzes the basic principle of DDS and its output frequency spectrum characteristic, and realizes it with VHDL language on FPGA. In regard to the output
Platform: | Size: 961536 | Author: 番薯军 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: DDS信号发生器，利用VHDL实现，可根据频率控制字的改变输出不同频率的信号，最高可到达10MBPS-DDS signal generator, the use of VHDL realization of frequency control word in accordance with changes in output signals of different frequencies, the maximum arrival 10MBPS
Platform: | Size: 784384 | Author: 陈宇 | Hits:

[SCM] DDS

Description: dds 正弦信号发生器步进100HZ 最高频率可达900kHZ 最低频率可大2.3Khz-dds signal generator sin walingbeam 100HZ
Platform: | Size: 989184 | Author: lin65505578 | Hits:

[Program doc] FPGA-DDS-FM

Description: DDS 调频信号发生器框图设计原理，有仿真测试结果-DDS signal generator FM Design Principle diagram
Platform: | Size: 69632 | Author: chenjiwei | Hits:

[Software Engineering] DDS-FM-FPGA

Description: DDS介绍,FM信号发生器的设计!基于DDS技术的FM信号发生器的设计及其FPGA实现-DDS introduced, FM Signal Generator! FM signal based on DDS technology and FPGA Implementation Generator
Platform: | Size: 356352 | Author: 雨夜里 | Hits:

[VHDL-FPGA-Verilog] FPGA_DDS

Description: 基于FPGA的DDS信号发生器产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-FPGA-based VHDL source DDS signal generator and the test stimulus file matlab model simulation in modelsim adopted under
Platform: | Size: 14486528 | Author: 乐毅学 | Hits:

[VHDL-FPGA-Verilog] Signal-Generator-VHDL

Description: 这是基于quartus dds信号发生器设计的源程序-This is based on quartus dds source signal generator design
Platform: | Size: 135168 | Author: 石浪 | Hits:

[VHDL-FPGA-Verilog] signal-generator

Description: Design of DDS signal generator based on VHDL+FPGA, has been through the adjustable, can be directly used, simulation -DDS signal generator circuit design, Verilog source code, can be directly used, simulation
Platform: | Size: 2070528 | Author: 李静璐 | Hits:

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[Communication-Mobile] EXPT12_10_PHAS_PLL1

[VHDL-FPGA-Verilog] DDS_VHDL_xzy

[VHDL-FPGA-Verilog] vhdl

[VHDL-FPGA-Verilog] ddswase

[Other Embeded program] DDS

[VHDL-FPGA-Verilog] ddsyixiang

[Software Engineering] DDS

[VHDL-FPGA-Verilog] sin125

[VHDL-FPGA-Verilog] vhdldds0000

[Software Engineering] DDS

[Other Embeded program] AD9854

[Other] EP1C3_12_10_PHAS

[Software Engineering] sji

[VHDL-FPGA-Verilog] DDS

[SCM] DDS

[Program doc] FPGA-DDS-FM

[Software Engineering] DDS-FM-FPGA

[VHDL-FPGA-Verilog] FPGA_DDS

[VHDL-FPGA-Verilog] Signal-Generator-VHDL

[VHDL-FPGA-Verilog] signal-generator

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