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[Other resource] dds_ise7.1_su

Description: 用Verilog语言实现信号发生器，包括AM，FM,PM，ASK,PSK,FSK调制。-using Verilog language signal generator, including AM, FM, PM, ASK, PSK, FSK modulation.
Platform: | Size: 5426 | Author: lee | Hits:

[VHDL-FPGA-Verilog] dds_ise7.1_su

Description: 用Verilog语言实现信号发生器，包括AM，FM,PM，ASK,PSK,FSK调制。-using Verilog language signal generator, including AM, FM, PM, ASK, PSK, FSK modulation.
Platform: | Size: 5120 | Author: lee | Hits:

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