Search - de1 nios

Search - de1 nios - List

[VHDL-FPGA-Verilog] test11 DL : 0: 在altera de1的板子上安装fat12fat16fat32文件系统，已经测试成功，直接能用-In altera de1 installed on the board fat12fat16fat32 file system has been tested successfully, the direct use
Update : 2025-02-17 Size : 7.99mb Publisher : 245680
[VHDL-FPGA-Verilog] VGA_Ctrl DL : 0: 基于NIOS II 的DE1开发板的VGA 控制器VGA控制模块主要控制VGA模块的开始和其运行的状态，需要写一个Avalon 从端口响应CPU的控制信号，继而控制整个模块的运行，-Based on the DE1 of the NIOS II development board VGA controller to control the VGA module VGA main control module and its operation began, and the need to write a response to Avalon from the CPU ports of the control signal, and then control the operation of the entire module,
Update : 2025-02-17 Size : 1kb Publisher : 黄涛
[VHDL-FPGA-Verilog] FPGA-DE1-PACMAN DL : 1: Pacman 4 DE1-FPGA-Board
Update : 2025-02-17 Size : 921kb Publisher : bert1970
[VHDL-FPGA-Verilog] Altera_DE1_Training_Courses_Multimedia_Platform.zi DL : 0: Altera DE1 多媒体平台训练课程视频教程-Altera DE1 training courses multimedia platform Video tutorial
Update : 2025-02-17 Size : 7.2mb Publisher : xiaoxu
[VHDL-FPGA-Verilog] DE1_NIOS DL : 0: Altera DE1的NIOS源程序，非常有参考价值,可直接投入使用-the niosII project of Altera DE1 borad. It can be used directly
Update : 2025-02-17 Size : 1.12mb Publisher : gaoyukun
[VHDL-FPGA-Verilog] GPS DL : 0: 基于NIOS驱动ALTERA DE1开发板的GPS模块工程-based on the nios ii drive the gpa module of altera de1 develop board,it s only a reference project
Update : 2025-02-17 Size : 12.76mb Publisher : 梁重
[VHDL-FPGA-Verilog] LCDPS2 DL : 1: 基于nios ii 驱动altera de1开发板上的lcd和ps2鼠标模块工程-based on the nios ii drive the lcd and ps2 module of altera de1 develop board
Update : 2025-02-17 Size : 12.52mb Publisher : 梁重
[VHDL-FPGA-Verilog] IICbus DL : 0: 基于nios ii 控制altera de1 开发板上iic总线实现与at24c02通信-Based on nios ii controlled altera de1 Development Board iic bus for communication with the at24c02
Update : 2025-02-17 Size : 12.9mb Publisher : 梁重
[VHDL-FPGA-Verilog] DE1_NIOS DL : 0: DE1开发板案例，基于NIOS的使用DE1_NIOS.rar-DE1 development board case, based on the use of DE1_NIOS.rar NIOS
Update : 2025-02-17 Size : 10.38mb Publisher : wangting
[VHDL-FPGA-Verilog] UART_DMA DL : 0: 基于DE1的nios的串口sdram通信例程-Based on DE1' s nios serial communication routines sdram
Update : 2025-02-17 Size : 10.83mb Publisher : 李
[VHDL-FPGA-Verilog] test DL : 0: DE1开发板基于Nios ii的10秒钟语音录放程序-DE1 development board based on Nios ii 10 seconds voice recording program
Update : 2025-02-17 Size : 14kb Publisher : thomas yang