Search - de2 s - CodeBus

[Embeded-SCM Develop] DE2_demonstrations

Description: 参加今年的比赛肯定要用的。谢谢支持。祝大家好运！-to participate in this year's competition sure to use. Thank you support. Luck!
Platform: | Size: 25665536 | Author: diguolaji | Hits:

[Embeded-SCM Develop] hello_world_0

Description: 此源码是用altera公司的nios II IDE开发的，基于DE2核心板的SD卡播放wav格式音频文件的程序-This source is altera s nios II IDE development, based on the core DE2 board SD card playback wav format audio files
Platform: | Size: 144384 | Author: zeng xuan | Hits:

[Embeded-SCM Develop] Binary_VGA_Controller

Description: VGA的IP核，可直接用于nios II的应用里，在DE2板子直接使用-VGA s IP core, can be used directly in nios II applications, the direct use in the DE2 board
Platform: | Size: 79872 | Author: 沈克镇 | Hits:

[Embeded-SCM Develop] ISP1362

Description: ISP1362的IP核，可直接用于nios II的应用里，在DE2板子直接使用-ISP1362 s IP core, can be used directly in nios II applications, the direct use in the DE2 board
Platform: | Size: 18432 | Author: 沈克镇 | Hits:

[Documents] DE2_scheamtics

Description: Altera 公司的DE2板子的原理图 PDF格式-Altera s DE2 board schematic diagram of the PDF format
Platform: | Size: 363520 | Author: 肖海涛 | Hits:

[Com Port] uart

Description: 开源的串口通信程序，用vhdl 编写的，已通过测试，在DE2的开发板上能够运行。-Open source serial communication procedures, prepared by using VHDL, has been tested in the DE2 development board to run.
Platform: | Size: 2048 | Author: caijl88 | Hits:

[OS Develop] sys_nios_verilog

Description: Verilog语言，nios最小系统，在DE2板上测试成功-Verilog language, nios minimum system, tested successfully in the DE2 board
Platform: | Size: 6640640 | Author: lf | Hits:

[Picture Viewer] DE2_CCD

Description: CCD的驱动程序，用于DE2板，可显示出摄像头采集的图像数据。-CCD driver for the DE2 board, show the camera s image data collection.
Platform: | Size: 1349632 | Author: churan | Hits:

[VHDL-FPGA-Verilog] DE2_CCD_detect

Description: DC2的用户手册，包括硬件原理图，软件编程程序，班子器件使用方法等-DC2 owner s manual, including the hardware schematics, software programming procedures, the use of devices such as team
Platform: | Size: 363520 | Author: churan | Hits:

[VHDL-FPGA-Verilog] DE2_USB_API

Description: 这是ALTERA 公司的DE2开发板上的关于USB API开发的例子-This is ALTERA' s DE2 Development Board regarding the USB API to develop examples of
Platform: | Size: 1380352 | Author: 翁文天 | Hits:

[VHDL-FPGA-Verilog] DE2_SD_Card_Audio

Description: DE2上SD卡的读写代码，应用环境quartus -DE2 on SD card to read and write code
Platform: | Size: 12817408 | Author: 向亚飞 | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_TV_NTSC

Description: DE2 S O P C 用硬件语言描述地开发板上测试 CLM模块实现视频传输-DE2 SOPC LCM
Platform: | Size: 228352 | Author: ZHAO | Hits:

[VHDL-FPGA-Verilog] tut_DE2_sdram_vhdl

Description: This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
Platform: | Size: 546816 | Author: *Roma* | Hits:

[VHDL-FPGA-Verilog] TrackingPresentation_jon

Description: presentation a low cost video tracking algorithm implemented on an Altera DE2 board with Cyclone II processor. System uses a VGA controller and several SG-DMA s-presentation on a low cost video tracking algorithm implemented on an Altera DE2 board with Cyclone II processor. System uses a VGA controller and several SG-DMA s
Platform: | Size: 1514496 | Author: stjohn | Hits:

[VHDL-FPGA-Verilog] DE2_SD_Card_Audio

Description: 基于Altera公司DE2的SD卡音乐播放所有源文件-Based on Altera' s DE2' s SD card music player, all the source files
Platform: | Size: 1635328 | Author: 兔子 | Hits:

[VHDL-FPGA-Verilog] HEX_DISPLAY

Description: Simple vhdl description to show numbers on 7-segment s on Altera DE2 board.
Platform: | Size: 310272 | Author: kvasir | Hits:

[Other] FPGA_and_SOPC_Technology_DE2_practice

Description: FPGA与SOPC设计教程-DE2实践,是基本Altera的DE2平台所写,与DE2紧密结合的一本书-FPGA and SOPC design tutorials-DE2 practice, is the basic platform of Altera' s DE2 written, closely integrated with the Altera University Program in a book
Platform: | Size: 30625792 | Author: 张亚群 | Hits:

[VHDL-FPGA-Verilog] main_control

Description: listing program to display a character in DE2 Altera s LCD with keyboard as an input
Platform: | Size: 1084416 | Author: kevin | Hits:

[VHDL-FPGA-Verilog] lab1

Description: DE2开发板配套LAB1里面源代码，一共六部分。-DE2 development board s source of lab1,which is seperated to 6 parts.
Platform: | Size: 1853440 | Author: 咸森 | Hits:

[VHDL-FPGA-Verilog] VHDL-based-design-of-SPI

Description: 基于VHDL的串行同步通信SPI设计本设计是用Quartus作为开发环境，以DE2板为硬件平台实现的SPI同步串行通讯。设计过程方便。根据接收和发送两个主要部分实现了SPI的基本功能。此外，该设计还实现了波特率发生器，数码管显示的功能。用DE2板实现具有电路简洁，开发周期短的优点。充分利用了EDA设计的优点。开发过程用了VHDL硬件描述语言进行描述，从底层设计，分模块进行，充分提高了设计者的数字逻辑设计的概念。-VHDL-based SPI serial synchronous communication design as the design is the use of Quartus development environment to DE2 board as the hardware platform of the SPI synchronous serial communication. Facilitate the design process. According to both send and receive SPI implements the main part of the basic functions. In addition, the design also implements the baud rate generator, digital display features. DE2 board to achieve a circuit with a simple, short development cycle advantages. Full use of the EDA design advantages. Development Process VHDL hardware description language used to describe the design from the ground, sub-module, to fully enhance the designer' s concept of digital logic design.
Platform: | Size: 51200 | Author: 陈添 | Hits:

« 12 3 4 »

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[Embeded-SCM Develop] DE2_demonstrations

[Embeded-SCM Develop] hello_world_0

[Embeded-SCM Develop] Binary_VGA_Controller

[Embeded-SCM Develop] ISP1362

[Documents] DE2_scheamtics

[Com Port] uart

[OS Develop] sys_nios_verilog

[Picture Viewer] DE2_CCD

[VHDL-FPGA-Verilog] DE2_CCD_detect

[VHDL-FPGA-Verilog] DE2_USB_API

[VHDL-FPGA-Verilog] DE2_SD_Card_Audio

[VHDL-FPGA-Verilog] DE2_LCM_TV_NTSC

[VHDL-FPGA-Verilog] tut_DE2_sdram_vhdl

[VHDL-FPGA-Verilog] TrackingPresentation_jon

[VHDL-FPGA-Verilog] DE2_SD_Card_Audio

[VHDL-FPGA-Verilog] HEX_DISPLAY

[Other] FPGA_and_SOPC_Technology_DE2_practice

[VHDL-FPGA-Verilog] main_control

[VHDL-FPGA-Verilog] lab1

[VHDL-FPGA-Verilog] VHDL-based-design-of-SPI

CodeBus www.codebus.net