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Description: 一个用VHDL语言编写的译码器程序，希望学习的人能够下载学习。
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Size: 735 |
Author: 毛江飞 |
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Description: AVPlayer分析实现源代码-AVPlayer analysis of the source code to achieve
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Size: 1318912 |
Author: 平时了 |
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Description: 一个用VHDL语言编写的译码器程序，希望学习的人能够下载学习。
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Size: 1024 |
Author: maomao |
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Description: 基于FPGA的BCD/七段译码器的设计，QuartusII编译通过，采用VHDL语言编写。-Based on FPGA BCD/these seven decoder design, QuartusII compile, USES the VHDL language.
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Size: 286720 |
Author: 左云华 |
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Description: Chapter4文件夹：
（1）实验1：编码器实验，完整的设计工程文件在CODER文件夹下
（2）实验2：译码器实验，完整的设计工程文件在DECODER7文件夹下
（3）实验3：加法器实验，完整的设计工程文件在ADDER和ALU文件夹下
（4）实验4：乘法器实验，完整的设计工程文件在4BITMULT文件夹下
（5）实验5：寄存器实验，完整的设计工程文件在SHIFT8R和SHIFT8文件夹下
（6）实验6：计数器实验，完整的设计工程文件在COUNT10文件夹下
（7）实验7：分频器实验，完整的设计工程文件在ODD_DEV_F文件夹下
（8）实验8：存储器实验，完整的设计工程文件在RAM文件夹下-Chapter4 folder: (1) Experiment 1: encoder experiment, the complete design engineering documents in the the CODER folder (2) Experiment 2: decoder experiments, complete design engineering documents under the folder DECODER7 (3) Experiment 3 : adder experiment, complete design engineering documents in the the ADDER and ALU folder (4) Experiment 4: Multiplier experiment, a complete design engineering documents in 4BITMULT folder (5) Experiment 5: register experiment complete design engineering file under the SHIFT8R and SHIFT8 folder (6) Experiment 6: counter experiment, a complete design the project file the COUNT10 folder (7) Experiment 7: divider experimental design the project file the ODD_DEV_F folder (8 ) Experiment 8: memory experiments, complete design project files in the the RAM file folder under
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Size: 1654784 |
Author: boyzone |
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