Search - delta-sigma verilog

Search - delta-sigma verilog - List

[Other resource] adc_verilog DL : 0: adc verilog 用verilog编写的sigma-delta adc例子应用在计量类adc产品
Update : 2008-10-13 Size : 3.1kb Publisher : 张鸿
[VHDL-FPGA-Verilog] modulator DL : 1: 运用FPGA控制AD9957的操作，调试过，运用VERILOG HDL编写-Use FPGA to control the operation of AD9957, debugging, and use the preparation of VERILOG HDL
Update : 2025-02-17 Size : 883kb Publisher : px99
[VHDL-FPGA-Verilog] FPGA-based-DAC DL : 1: 用fpga实现的DA转换器，有说明和源码，VDHL文件。 A PLD Based Delta-Sigma DAC Delta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinary performance and low cost of today s audio CD players. The simplest Delta-Sigma DAC consists of a Delta-Sigma modulator and a one bit DAC. Since, both of these components can be realized using digital circuits, it is possible to implement a low precision Delta-Sigma DAC using a PLD.-Using FPGA to achieve the DA converter, has descriptions and source code, VDHL document. A PLD Based Delta-Sigma DACDelta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinaryperformance and low cost of today s audio CDplayers. The simplest Delta-Sigma DAC consists of aDelta-Sigma modulator and a one bit DAC. Since , both of these components can be realized usingdigital circuits, it is possible to implement a lowprecision Delta-Sigma DAC using a PLD.
Update : 2025-02-17 Size : 57kb Publisher : 开心
[VHDL-FPGA-Verilog] adc_verilog DL : 0: adc verilog 用verilog编写的sigma-delta adc例子应用在计量类adc产品-adc verilog Verilog prepared using sigma-delta adc examples used in the measurement adc Product category
Update : 2025-02-17 Size : 3kb Publisher : 张鸿
[VHDL-FPGA-Verilog] verilogsigma-deltaadc DL : 0: 用verilog编写的sigma-deltaADC的源程序。-code of verilog for sigma delta ADC
Update : 2025-02-17 Size : 4kb Publisher : 刘晓志
[Other systems] sigmadelta_verilog_code DL : 1: sigma delta verilog code and testbench for you to do simulation
Update : 2025-02-17 Size : 1kb Publisher : zhhy3818
[VHDL-FPGA-Verilog] adc_spi DL : 0: dsp通过SPI接口数据采集 sigma-delta ADC采集程序-dsp through the SPI interface, data acquisition sigma-delta ADC acquisition program
Update : 2025-02-17 Size : 8kb Publisher : xingtian
[Other] Verilog-Code DL : 1: Verilog source code by James Patchell: - Delta Sigma Modulator for doing Digital->Analog Conversion - Aquad-bquad phase detector - Uart Reciever - Uart Transmitter - One shot
Update : 2025-02-17 Size : 7kb Publisher : happyuser
[Other] dac_sigma_delta DL : 1: verilog code for a 2nd order sigma delta modulator
Update : 2025-02-17 Size : 1.49mb Publisher : Alberto W. Jr
[VHDL-FPGA-Verilog] delta-sigma-DAC DL : 0: 根据FPGA的∑-Δ D/A转换器的设计与实现策略，∑-Δ DAC的内部仅由2个10位的二进制加法器，1个10位的锁存器和一个D触发器组成，用FPGA实现时只需耗费极少的逻辑资源，即使用最小的FPGA也能实现。这是∑-Δ DAC实现的verilog语言-According to the FPGA Σ-Δ D/A converter design and implementation strategies, Σ-Δ DAC' s internal only by the two 10-bit binary adder, a 10-bit latch and a D flip-flop, with the FPGA implementations consume only minimal logic resources, using the smallest FPGA can achieve. This is the Σ-Δ DAC implementation verilog language! ! !
Update : 2025-02-17 Size : 1.27mb Publisher : 王凌
[Other] 用verilog编写的sigma-delta adc例子 DL : 0: 累加器实现艾哈空间哈卡哈尽快啊哈卡哈卡快捷回复哈哈哈看(Accumulator implementation)
Update : 2025-02-17 Size : 4kb Publisher : 西伯利亚牛
[VHDL-FPGA-Verilog] VERILOG DL : 1: 基础的几个verilog代码实现，讲到case和task的使用。(basic verilog,use case and task ,very usual, i want some help to achieve the design of delta and sigma fractional_n divider.)
Update : 2025-02-17 Size : 86kb Publisher : sana00