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[OS Develop] 编码的奥秘 DL : 0: 本书用大量的篇幅讲述了与计算机原理相关的条种编码方法，并通过数字逻辑电路(包括逻辑与开关，逻辑门电路与触发器，二进制加法器等)以及存储器、微处理器的形式、组织及发展阐述了编码的实现。此外，本书还涉及到计算机系统、操作系统、编程语言等的产生及发展，甚至对计算机图形化的相关技术也给了一个全面的描述。阅读本书，相信您会从它图文并茂的编排组织，通俗风趣的语言文字、简练丰富的背景知识中体会到作者超凡的智慧和深邃的学问。本书定会带你去畅游计算机内部世界并和你共同去探索编码的奥秘。本书适合各种技术背景的人阅读，并可作为高等院校计算机或非计算机专业的教材使用-This book with plenty of space to talk about with computer-related articles of the principle of encoding method, and through digital logic circuit (including logic and switches, logic gates and flip-flops, binary adder, etc.) as well as the memory, microprocessor form Organization and development on the realization of coding
Date : 2025-07-16 Size : 6.3mb User : 余瑛
[Other] A_First_Couse_in_Digital_Systems_Design_An_Integra DL : 0: 数字系统设计基础教程本书将数字系统作为一个整体的系统，并按层次结构对数字系统进行划分和论述。论题涉及了数字系统技术的各个方面，如：数制、编码、布尔代数、逻辑门、组合逻辑设计、时序电路、VHDL基本概念、VLSI设计基本概念、CMOS逻辑电路和硅芯片、存储器部件、计算机原理和计算机体系结构基础知识等等。本书将传统的数字电路知识和现代技术相结合，适于大专院校相关专业的学生作教科书之用。 -Digital System Design Essentials book digital system as a whole system, together with a hierarchical structure of digital systems division and expositions. Topics related to digital systems in all aspects of technology, such as: the number system, coding, Boolean algebra, logic gates, combinational logic design, sequential circuits, VHDL basic concepts, VLSI design of the basic concepts, CMOS logic circuits and silicon chips, memory components, computer principles and basic knowledge of computer architecture and so on. This book will be a traditional digital circuit knowledge and modern technology, suitable for students of the relevant professional institutions for use in textbooks.
Date : 2025-07-16 Size : 17.36mb User : 陨星
[File Format] shuziluoji DL : 0: 数字逻辑基础知识与习题指导：数制及编码，逻辑代数基础，逻辑门电路，组合逻辑电路等-Digital logic based on knowledge and exercise guidance: Number System and coding, the basis of logic algebra, logic gates, combinational logic circuit, etc.
Date : 2025-07-16 Size : 2.07mb User : wwz
[Other] p3 DL : 0: Tutorial Digital Logic gates using multisim
Date : 2025-07-16 Size : 203kb User : lucas mg
[Other Embeded program] digital_logic_gates DL : 0: A graphic simulation of digital logic gates whitch can be used in DIGITAL DESIGN
Date : 2025-07-16 Size : 6kb User : majid
[Other] Vhdl-Primer-by-Bhaskar DL : 0: This book, written by J. Bhaskar explains all the basic concepts of VHDL(Very High Speed Integrated Circuit Hardware Discription Language). VHDL is used to design digital logic gates on a chip. 163 Pages
Date : 2025-07-16 Size : 1.07mb User : frank
[assembly language] asm_ch2_dl DL : 0: Digital logic, digital logic gates
Date : 2025-07-16 Size : 1.54mb User : techsony m
[Documents] 200971617402035228 DL : 0: 数字钟的设计用到，数制、基本逻辑运算、逻辑门电路、组合逻辑电路、触发器、时序逻辑电路、脉冲的产生等数字电路知识。-Digital clock design used, number system, basic logic operations, logic gates, combinational logic circuits, flip-flops, sequential logic circuits, pulse generator and digital circuit knowledge.
Date : 2025-07-16 Size : 301kb User : 张龙
[VHDL-FPGA-Verilog] NCLPROJECT DL : 0: The main objective of the project is to reduce the complexity of the digital circuit with improvement in performance. Two versions of a reconﬁ gurable logic element are implemented one without extra embedded registration and the other with extra embedded registration. The one with extra embedded registration requires an additional latch but reduces the computing time considerably. Both these versions can be configured as any one of the 27 fundamental NCL gates, including the resettable and inverting variations. The two approaches are compared with each other showing that the version with extra embedded registration requires less computing time than the version without extra embedded registration. -The main objective of the project is to reduce the complexity of the digital circuit with improvement in performance. Two versions of a reconﬁ gurable logic element are implemented one without extra embedded registration and the other with extra embedded registration. The one with extra embedded registration requires an additional latch but reduces the computing time considerably. Both these versions can be configured as any one of the 27 fundamental NCL gates, including the resettable and inverting variations. The two approaches are compared with each other showing that the version with extra embedded registration requires less computing time than the version without extra embedded registration.
Date : 2025-07-16 Size : 6kb User : Nagendran
[Algorithm] Classical_digital_circuit_logic_gates_tutorial DL : 0: 数字电路逻辑门电路经典教程Classical digital circuit logic gates tutorial-Classical digital circuit logic gates tutorial Classical digital circuit logic gates tutorial
Date : 2025-07-16 Size : 366kb User : ccx
[Other] bianmadeaomi DL : 0: 本书用大量的篇幅讲述了与计算机原理相关的条种编码方法，并通过数字逻辑电路(包括逻辑与开关，逻辑门电路与触发器，二进制加法器等)以及存储器、微处理器的形式、组织及发展阐述了编码的实现。-This book tells a lot of space associated with the principle of Article kinds of computer coding methods, and through the digital logic circuit (including the logic and switches, logic gates and flip-flop, binary adder, etc.) and memory, the microprocessor in the form of Organization and implementation of the development of elaborated code.
Date : 2025-07-16 Size : 6.3mb User : lvan
[AI-NN-PR] logic-gates DL : 0: it is a new theory of gats which describes all function of gates and all fundamental things of gates which is used in digital electronics
Date : 2025-07-16 Size : 9kb User : rain
[Other] VHDL_book1 DL : 0: gate：基本逻辑门的实现和验证 mux4_1_gate：多路复用器的门级实现和验证 mux4_1_behav：多路复用器的行为级实现和验证 seg7_gate：7段数码管逻辑门实现和验证 seg7_behav：7段数码管case语句描述和验证 mux7seg：采用按键复用7段数码管的实现和验证 clkseg7：采用时钟自动扫描复用7段数码管的实现和验证 comp4_gate：4位比较器结构化实现和验证 comp8_behav：8位比较器行为实现和验证 decode3_8_gate：3-8译码器的逻辑门实现和验证 decode3_8_behav：3-8译码器的case语句实现和验证 encode8_3_gate：8-3编码器的门级实现和验证 encode8_3_behav：8-3编码器的逻辑门实现和验证 priority_encoder8_3： 8-3优先级编码器的循环语句实现和验证 binbcd4_gate：4位二进制码到BCD码变换设计 binbcd8_behav：8位二进制码到BCD码变换设计 bin_gray4_gate：4位二进制码到Gray码的变换设计 binbcd4_gate：4位Gray码到二进制码变换设计-gate: the realization of basic logic gates and verification mux4_1_gate: multiplexer gate-level implementation and verification mux4_1_behav: Multiplexer behavioral implementation and verification seg7_gate: 7-segment digital tube logic gate implementation and verification seg7_behav: 7 segment digital tube case statements describe and validate mux7seg: using buttons multiplex seven segment LED implementation and verification clkseg7: clock automatically scans using 7-segment digital tube multiplex implementation and verification comp4_gate: 4-bit comparator structured implementation and verification comp8_behav: 8-bit comparator behavior implementation and verification decode3_8_gate :3-8 decoder logic gate implementation and verification decode3_8_behav :3-8 decoder implementation and verification of case statement encode8_3_gate :8-3 encoder gate-level implementation and verification encode8_3_behav :8-3 encoder implementation and verification of logic gates priority_encoder8_3: 8-3
Date : 2025-07-16 Size : 7.27mb User : 贾诩
[Other] ZONGTU DL : 0: 1．集成计数器、译码器或数据选择器、逻辑门、数码管、开关等分立元件若干； 2．+5V电源一个； -1. Integrated counter, decoder or data selector, logic gates, digital control, a number of discrete components, such as switches 2.+5 V supply one
Date : 2025-07-16 Size : 149kb User : 张宇
[Program doc] ADvances-in-Digital-Optical-Computing DL : 0: A current approach in applying photonics to digital computing is to interconnect arrays of optical logic gates in free space with regular patterns, such as perfect shuffles or crossovers. Circuit depths and breadths are only slightly worse than when irregular optical interconnects are used, but the optics are significantly simplified by using regular interconnects. Problems relating to the design of digital circuits are summarized as well as approaches to solving the problems.
Date : 2025-07-16 Size : 254kb User : sf