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[
VHDL-FPGA-Verilog
]
FIR低通滤波器部分模块
Description:
一个FIR低通滤波器,最小阻带衰减-30db,带内波动小于1db．用MAXPLUS2设计与仿真。-This is a FIR LPF, with-30dB in stop-band and sigma is less than 1dB. It is designed and simulated on MAXPLUS2.
Platform:
|
Size:
5120
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Author:
吴健宇
|
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Search - digital low pass fir filter design VHDL code