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[Software Engineeringfifo2.pdf

Description: 以TI公司的DSP芯片TMS32OC6204为例,结合IDT公司的先进先出缓存芯片IDT72V3640,介绍了其扩展总线XB在DMA控制下对FIFO进行读写,以实现对图像的实时采集、处理。 -to TI's DSP TMS32OC6204 example, The combined company IDT FIFO-chip cache IDT72V3640. on the expansion of the bus XB under the control of DMA FIFO read, write, in order to achieve the real-time image acquisition, handle.
Platform: | Size: 248176 | Author: 权溪 | Hits:

[Program docPcidriver

Description: PCI驱动编程实例,通过PCI可实施操作: 2、通过DMA方式往SDRAM写数据的步骤: (1) 往OMB1写传输数据次数 (2) 往OMB2写所要访问的SDRAM地址 (3) 往FIFO写2 3、通过DMA方式从SDRAM读数据的步骤: (1) 往OMB1写传输数据次数 (2) 往OMB2写所要访问的SDRAM地址 (3) 往FIFO写3 -PCI-driven programming examples, can be implemented through the PCI operation : 2, DMA SDRAM write data to the steps : (a) to transfer data OMB1 write the number (2) to OMB2 was to be visited SDRAM Address (3) to FIFO write 2 3 through DMA side SDRAM-time data from the steps : (a) to transfer data OMB1 write the number (2) to OMB2 was to be visited SDRAM Address (3) to write FIFO 3
Platform: | Size: 62464 | Author: 葛琳 | Hits:

[Software Engineeringfifo2.pdf

Description: 以TI公司的DSP芯片TMS32OC6204为例,结合IDT公司的先进先出缓存芯片IDT72V3640,介绍了其扩展总线XB在DMA控制下对FIFO进行读写,以实现对图像的实时采集、处理。 -to TI's DSP TMS32OC6204 example, The combined company IDT FIFO-chip cache IDT72V3640. on the expansion of the bus XB under the control of DMA FIFO read, write, in order to achieve the real-time image acquisition, handle.
Platform: | Size: 247808 | Author: 权溪 | Hits:

[Embeded-SCM Developsd_audio_aic23

Description: SD卡和AIC23数字音频输出实验, FreeDev Audio Dsp Board采用了TI公司的TVL320AIC23 1、控制接口使用I2C,Quartus中将CS置低(器件地址0011010)。 2、数字音频接口使用了组件FreeDev_aic23,有三种测试和应用 模式,中断结合DMA方式能在NIOS II中采集和发送数据。中断信号 产生于模块中FIFO缓冲区的半满信号,读取数据端口自动清除中断 请求信号。 3、I2C IP 和FreeDev_aic23 IP分别在Quartus 工程目录中 4、SD卡读写通过SD_DAT0、SD_CLK、SD_CMD三个PIO信号线用软件 控制时序。 5、该范例读SD卡数据,通过DMA将Buffer数据送到FreeDev_aic23的 FIFO中实现数据播放。 6、SD卡中的数据必须是以48K*16bit保存的采样数据。数据可以通过SD读卡器写入。
Platform: | Size: 13312 | Author: HuFengzhang | Hits:

[Windows Developdmapara.ZIP

Description: Very fast file transfer over the parallel port, using dma and fifo, fast and slow methods. It works in dos and windows. It works in nt , if you use a program to open the ports so as winio. I have achived rates of 750 kbytes/sec in the fifo mode. The dma max seems to be about 500 kbytes/sec. You must make your own special parallel cable. Directions are given in dmapara.txt. I used a flat cable with every second line a ground. The maximum length seems to be about 5 meters.
Platform: | Size: 32768 | Author: dancie | Hits:

[SCMcc2430_lib_and_app_1.0

Description: CC2430RF代码,DMA方式发送,FIFO方式-RF CC2430
Platform: | Size: 466944 | Author: 王超 | Hits:

[TCP/IP stackCCD

Description: CCD数字相机的全代码,DMA方式读取FPGA,FIFO送入计算机,网口跑UDP协议-CCD digital camera the entire code, DMA mode to read FPGA, FIFO into the computer, I run UDP network protocol
Platform: | Size: 40960 | Author: ccdd | Hits:

[DSP programFIFOSRC

Description: DSP uart窗口通信中的一种通信格式,FIFO模式的一个小程序-dsp serial communication uart communication first in first out-FIFO mode
Platform: | Size: 4096 | Author: luoxin | Hits:

[VHDL-FPGA-Verilogsdcard_mass_storage_controller_latest.tar

Description: 基于wishbone总线的SD Card IP Core,有Verilog和VHDL两种语言版本,包含了FIFO和DMA两种实现方式,是开源的IP Core-Based on the wishbone bus SD Card IP Core, there are two language versions of Verilog and VHDL, including the FIFO and DMA implemented in two ways, is open source IP Core
Platform: | Size: 2271232 | Author: 张亚群 | Hits:

[Software EngineeringPCI9054

Description: 特性 • 符合PCI 2.2版本规范,32位,33MHz总线 • 普通主总线接口,包含两个(可编程的主从数据传输模式和PCI消息功能的)DMA引擎 • 支持PCI v2.2 重要产品数据 (VPD) 配置 • 支持 PCI双地址周期 (DAC) • PCI Hot Plug and CompactPCI Hot Swap compliant • I2O™ v1.5-Ready Messaging Unit • Two independent DMA channels for Local Bus memory to and from PCI Host Bus Data transfers • 支持Type 0 和Type 1 配置 • 可编程突发传输管理 • 可编程中断产生器 • 6个可编程并且可0等待突发操作的FIFO • PCI ↔ Local 数据传输速率达到132 MB/s-pci9054
Platform: | Size: 180224 | Author: 何家 | Hits:

[SCMSTM32_DMA_FIFO_an3109

Description: st company micro processor stm32f DMA FIFO communication.
Platform: | Size: 1253376 | Author: mm | Hits:

[VHDL-FPGA-Verilogbased-on-Xilinx-PCIe-Core-DMA

Description: 1, 支持由板卡发起的DMA操作,既可以将板卡内的数据快速传输到PC,也可以将PC的数据读取到板卡内。DMA的可以通过PCIe的BAR0空间控制。 2, 利用Xilinx LogiCORE Endpoint Block Plus硬核,兼容Virtex 5、Virtex 6、Spartan 6系列。无缝支持PCIe x8、x4、x1速率 。 3, 在板卡的终端是标准的FIFO接口,可以接入各种形式的数据,例如AD采样数据,光纤数据,DA数据。 4, DriverStudio生成的驱动代码,最大限度的提高连续传输的速率,同时降低PC的负载。 5, 用户自定义BAR2空间,可用作自定义控制。 6, 支持32位和64位操作系统。
Platform: | Size: 2329600 | Author: rosen | Hits:

[Linux-Unixdma-example

Description: Sample fifo dma implementation driver for Linux.
Platform: | Size: 1024 | Author: cenggopan | Hits:

[JSP/JavaFIFO

Description: FIFO TOURNIQUET RMA DMA ALgorithme in java BY CHACHOU MOHAMMED Morocco raaaaaaaa9-FIFO TOURNIQUET RMA DMA ALgorithme in java BY CHACHOU MOHAMMED Morocco raaaaaaaa9
Platform: | Size: 55296 | Author: mohammed | Hits:

[Linux-Unixdma-example

Description: Sample fifo dma implementation for Linux v2.13.6.
Platform: | Size: 1024 | Author: yenzavin | Hits:

[Linux-Unixusb_ops_linux

Description: translate DMA FIFO addr to pipehandle.
Platform: | Size: 3072 | Author: gfktvf | Hits:

[Linux-Unixdma-example

Description: This module shows how to handle fifo dma operations.
Platform: | Size: 1024 | Author: taohaidin | Hits:

[ARM-PowerPC-ColdFire-MIPSzc706-axi-dma-fifo-master

Description: zc706 axi-dma-fifo-master example
Platform: | Size: 31744 | Author: Yerba | Hits:

[SCMfifo

Description: 一个简单的FIFO实现,基于STM32的UART+DMA方式。(A simple FIFO implementation, based on the STM32 UART+DMA approach.)
Platform: | Size: 1024 | Author: 与众漫步 | Hits:

[SCM无FIFO摄像头 DMA传送

Description: 该程序是使用了无fifo的7670摄像头,使用dma传输方式,能够稳定传输图像(The program uses a FIFO - free 7670 camera and uses DMA transmission to stabilize the transmission of the image)
Platform: | Size: 16634880 | Author: tgy112 | Hits:
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