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Description: JTAG仿真器CPLD -JTAG Emulator CPLD
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Size: 345088 |
Author: 李秉 |
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Description: 该工程文件实现ARM系统中CPLD的逻辑工作，起到外围资源的逻辑地址译码功能-realization of the project document ARM system CPLD logic, external resources have address decoding logic function
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Size: 117760 |
Author: 王希 |
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Description: DSP2407上实现数控IO功能的C语言源程序，此程序与硬件有关（使用了CPLD），但测试部分有一定参考价值。
-DSP2407 NC IO on the C language function source, this procedure with the hardware (using the CPLD), but there are certain tests of some reference value.
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Size: 14336 |
Author: |
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Description: 用maxplus2实现的一种通用逻辑模块，背景是一个基于dsp的嵌入式开发板，上面的逻辑模块全用cpld实现。此模块可以供以后的嵌入式开发作参考。-maxplus2 achieved using a common logic modules, background is a DSP-based embedded development board, the above logic modules throughout cpld achieve. This module can be embedded for the future development for reference.
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Size: 435200 |
Author: hanchong |
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Description: Writing Efficient C for ARM
基于ARM内核微处理器操作系统的移植
基于ARM的嵌入式开发(PDF ARM中国)
ARM+DSP+CPLD开发板
s3c2410(arm9)protel99格式的原理图和PCB图
-Writing Efficient C for ARM microprocessor-based ARM core operations transplantation of ARM-based embedded development (PDF ARM China) ARM DSP development board CPLD s 3c2410 (arm9) Protel format schematics and PCB plans
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Size: 957440 |
Author: 胡飞逸 |
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Description: Writing Efficient C for ARM
基于ARM内核微处理器操作系统的移植
基于ARM的嵌入式开发(PDF ARM中国)
ARM+DSP+CPLD开发板
s3c2410(arm9)protel99格式的原理图和PCB图-Writing Efficient C for ARM microprocessor-based ARM core operations transplantation of ARM-based embedded development (PDF ARM China) ARM DSP development board CPLD s 3c2410 (arm9) Protel format schematics and PCB plans
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Size: 507904 |
Author: 胡飞逸 |
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Description: dsp与cpld的连接原理图，华绑的哦！-dsp and cpld connection diagram, China tied Oh!
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Size: 15360 |
Author: 冬虫草 |
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Description: 针对多DSP 共享总线的通用信号处理板卡, 介绍了基于PCI9054 和CPCI 总线的接口设计,
分析了通用WDM总线驱动程序的开发。采用Verilog HDL 用CPLD 设计控制时序实现了DSP 和
CPCI 总线桥接器PCI9054 之间的普通传输和高速DMA 传输。驱动程序采用DriverWorks 和Windows
驱动开发包DDK 进行开发, 具有很好的通用性和可移植性。-err
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Size: 223232 |
Author: 都上课 |
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Description: 此程序用于视频采集过程中CPLD对时序的转换与组合代码，每两行采集一行，两列采集一列，减小数据量，同时能保证采集完整的一幅图像（输出OUT用于DSP或者单片机中断）-err
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Size: 1024 |
Author: 王强强 |
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Description: DSP与CPLD通信方法 有需要的请下载-DSP and CPLD communication methods are needed, please download
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Size: 59392 |
Author: 李超 |
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Description: 用CPLD实现DSP与PLX9054之间的连接-DSP with CPLD and realize the connection between the PLX9054
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Size: 128000 |
Author: 宋涛 |
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Description: TMS320vc5402综合实验板原理图,包括STC89LE58RD+芯片，以及CPLD ，对嵌入式硬件系统开发，有很大参考价值
-TMS320VC5402 comprehensive experimental board schematics, including STC89LE58RD+ Chips, as well as the CPLD, the embedded hardware systems development, has a great reference value
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Size: 286720 |
Author: JOSH |
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Description: MAX II CPLD具有灵活的可编程接口，合并了分立的FLASH存储器件，能快速和容易地配置FPGA，DSP，ASIC等。本中文手册将让用户对CPLD有一个宏观的认识。-MAX II CPLD with a flexible programmable interface, the merger of the separation of FLASH memory, can quickly and easily configure the FPGA, DSP, ASIC, etc.. Chinese manual will allow users to have a macro on the CPLD awareness.
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Size: 990208 |
Author: pantree |
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Description: 用DSP进行语音压缩的一个开发实例（PCI总线）。详细介绍了PCI总线以及语音压缩数字信号处理系统的软、硬件系统设计方案及架构-DSP for voice compression using the example of a development (PCI bus). Detailed information on PCI bus, as well as voice compression digital signal processing system software and hardware system design and architecture
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Size: 332800 |
Author: PB |
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Description: 学习fpga/cpld的书籍，介绍quartus 2及dsp builder的使用，-Learning fpga/cpld books, introduced quartus 2 and dsp builder use,
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Size: 14001152 |
Author: 彭武军 |
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Description: 零零电子2407+cpld开发板的源程序，可用于参考学习-Page E-2407+ cpld development board of the source, can be used to refer to learning
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Size: 967680 |
Author: zhaowenjun |
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Description: 00IC2407＋CPLD板上选用的DA转换器是TI公司的TLC5620,TLC5620是串行4通道8位
DA 转换器，DSP 通过 SPI 与其接口，TLC5620 的工作频率是 1MHZ,所有 DSP 的 SPI也必须设置位1MHZ, -00IC2407+ CPLD DA converter board is selected TI' s TLC5620, TLC5620 is a serial 4-channel 8-bit DA converters, DSP and its interface, through the SPI, TLC5620 operating frequency is 1MHZ, all the DSP' s SPI must also be set bit 1MHZ,
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Size: 67584 |
Author: lizhenli |
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Description: 2407A 内置 16 通道10 位AD 转换器，在 00IC2407＋CPLD 实验板上只扩展两通道，分
别是第0 通道和第8通道，DSP 能承受的A/D 输入信号是0－3.3V，在00IC2407+CPLD 实
验板上没有单独采用基准源，直接使用系统的3.3V作为A/D 转换器的基准信号。 -Built-2407A 16-channel 10-bit AD converter, in 00IC2407+ CPLD experiment board extended only two channels, namely, 0-channel and 8-channel, DSP can withstand the A/D input signal is 0-3.3V, in 00IC2407+ CPLD There is no separate test board with reference to directly use the system' s 3.3V, as A/D converter reference signal.
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Size: 79872 |
Author: lizhenli |
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Description: 基于DSP+CPLD的伺服控制卡的设计,资料很好，很不错，希望对大家有用。-Based on DSP+ CPLD design of the servo control card, data very good, very good, and I hope useful.
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Size: 336896 |
Author: 高继良 |
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Description: 基于DSP&CPLD的载波移相多电平PWM实现的研究-DSP & CPLD-based carrier phase multi-level implementation of PWM
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Size: 224256 |
Author: zhoujie |
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