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[VHDL-FPGA-Verilog] 80sp1_DSP

Description: Altera 的DSP Builder 8.0的破解文件-Crack files for dsp builder 8.0
Platform: | Size: 186368 | Author: luo shen | Hits:

[Other] dspbuilder_manul

Description: 这份文献主要介绍了dsp builder 8.0的功能及使用手册，介绍了如何和matlab一起使用的步骤。-This literature focuses on the dsp builder 8.0 features and user manual describes how to matlab and used in conjunction with steps.
Platform: | Size: 15432704 | Author: 纪伟 | Hits:

[VHDL-FPGA-Verilog] cic

Description: 在MATLAB2007A/SIMULINK环境下用DSP BUILDER8.0实现了五级CIC，解决了溢出问题。生成了可用的VHDL文件。- DSP BUILDER8.0 A 5 stages CIC filer is realized in MATLAB2007A/SIMULINK by using DSP Builder 8.0.The overflow problem is resulved.Useful VHDL files are generated at last.
Platform: | Size: 1543168 | Author: hcq | Hits:

[VHDL-FPGA-Verilog] Crack_Altera_6[1][1].0-9.1

Description: quartus版本的破解 从6.1至9.0间所有版本-quartus crack version from 6.1 to 9.0 all versions
Platform: | Size: 138240 | Author: ziluolee | Hits:

[DSP program] dspbuilder6-9.1crack

Description: dsp builder 6.0 7.0 8.0 9 .1 破解-dsp builder 6.0 7.0 8.0 9.0 9.1 crack
Platform: | Size: 287744 | Author: ys | Hits:

[DSP program] Crack_Altera_6.0-9.1

Description: DSP builder6.0-9.0和quartus ii6.0-9.0等版本的破解器，注意运行破解器时最好关闭杀毒软件，否则有可能会出错-DSP builder6.0-9.0 and quartus ii6.0-9.0 and other versions of the cracker, pay attention to when the best off running the cracker antivirus software, or they may be wrong
Platform: | Size: 137216 | Author: | Hits:

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