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[Embeded-SCM Develop] 双口RAM硬件和软件可靠性握手的实现

Description: 双口RAM硬件和软件可靠性握手的实现 双口RAM硬件和软件可靠性握手的实现-dual-port RAM reliability of the hardware and software to shake hands with the dual port RAM hardware and software to achieve the reliability handshake
Platform: | Size: 97280 | Author: 笑千秋 | Hits:

[Other Embeded program] fifo-ram

Description: 采用Verilog语言描述的FIFO和双端口RAM源代码。-Verilog language used to describe the FIFO and dual-port RAM source code.
Platform: | Size: 1024 | Author: 蒋大为 | Hits:

[VHDL-FPGA-Verilog] Asynchronous_read_write_RAM

Description: Dual Port RAM Asynchronous Read/Write 经过modelsim仿真 -Dual Port RAM Asynchronous Read/Write through ModelSim Simulation
Platform: | Size: 1024 | Author: lianlianmao | Hits:

[SCM] RAM

Description: 双口RAM的应用-Application of dual-port RAM
Platform: | Size: 168960 | Author: puppy | Hits:

[VHDL-FPGA-Verilog] RAM

Description: 双口RAM与PXI总线接口设计，包括接口控制。-Dual-port RAM with PXI bus interface design, including interface control.
Platform: | Size: 1216512 | Author: zwt | Hits:

[Other] FPGA-TWO-RAM

Description: 这样就可以在FPGA内实现双口RAM了-This can be achieved in the FPGA dual-port RAM
Platform: | Size: 4096 | Author: zhan | Hits:

[Linux-Unix] DP_RAM_lab

Description: 用SmartGen 生成一个2k*8 Dual Port RAM，并通过串口发送数据初始化RAM。然后通过串口返回到上位机的串口调试程序显示。-SmartGen generated using a 2k* 8 Dual Port RAM, and sending data through the serial port to initialize RAM. And back through the serial port to the PC serial port debugger display.
Platform: | Size: 4096 | Author: 劳杰勇 | Hits:

[DSP program] dual-ram

Description: 实现双口RAM映射到DSP地址单元空间中，使得双口RAM直接读取DSP中的数据或程序。-Achieve dual-port RAM modules mapped to the DSP address space, making dual-port RAM directly read the data in the DSP or procedures.
Platform: | Size: 2048 | Author: 王正刚 | Hits:

[VHDL-FPGA-Verilog] ram

Description: 基于altera ep2c8双口RAM -Altera ep2c8-based dual-port RAM
Platform: | Size: 884736 | Author: 秦学富 | Hits:

[VHDL-FPGA-Verilog] RAM

Description: 这是个双端口双端口ram的定义，当然读者在此基础上还可以扩充-This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded
Platform: | Size: 50176 | Author: lee | Hits:

[VHDL-FPGA-Verilog] dpram2

Description: vhdl写的双口ram，真正实现双口通信-I write vhdl dual ram, true dual-port communication
Platform: | Size: 2832384 | Author: fenglei | Hits:

[VHDL-FPGA-Verilog] dpRam1

Description: Dual port ram design project developed in Xilinx using VHDL
Platform: | Size: 741376 | Author: qaziguy | Hits:

[VHDL-FPGA-Verilog] ram

Description: 一个用VHDL语言编写的双端口存储器程序，可下载在FPGA中使用-Written in VHDL language using a dual-port memory program can be downloaded in the FPGA using
Platform: | Size: 4096 | Author: cloudy | Hits:

[Other] RAM

Description: 双口RAM Verilog描述 双口RAM Verilog描述-Dual-port RAM Verilog description of dual-port RAM Verilog description of dual-port RAM Verilog description of
Platform: | Size: 15360 | Author: 关键 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 双口RAM模块源代码（VHDL）,用于开发FPGA的双口RAM，可以直接下载到工程中使用。-Dual-port RAM module source code (VHDL), for the development of FPGA' s dual-port RAM, can be directly downloaded to the project use.
Platform: | Size: 1024 | Author: wu | Hits:

[VHDL-FPGA-Verilog] ram_dp_sr_sw

Description: dual ram port in verilog
Platform: | Size: 1024 | Author: sayhaa | Hits:

[VHDL-FPGA-Verilog] dualportram_asch

Description: This an asychronous dual port ram-This is an asychronous dual port ram
Platform: | Size: 1024 | Author: iman | Hits:

[MiddleWare] DualPortRam

Description: A systemc implementation of dual port ram module. A vcd file as the sample result is also included. There is a generator for reading/writing data from/to the two ports of the RAM, the tracing of which is offered using the sc_trace API.
Platform: | Size: 7168 | Author: 鲁克文 | Hits:

[VHDL-FPGA-Verilog] actel-fpga-double-port-ram

Description: 基于Actel FPGA的双端口RAM设计--周立功单片机-Actel FPGA-based dual-port RAM design- ZLG MCU
Platform: | Size: 271360 | Author: fei | Hits:

[VHDL-FPGA-Verilog] dpram

Description: FPGA实现双口RAM的工程文件，直接拿ISE打开即可，或者找里面的.VHD文件也可以-FPGA dual RAM
Platform: | Size: 352256 | Author: hzh | Hits:
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