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[Driver Develope1-10

Description: 芯片bt8237的底层驱动,实现E1/T1帧的构建-chip bt8237 the bottom drive to achieve E1/T1 Frame Construction
Platform: | Size: 37807 | Author: 刘勇 | Hits:

[CommunicationG0704E

Description: ITU规范G.704。E1帧结构定义。Synchronous frame structures used at 1544, 6312, 2048, 8448 and 44 736 kbit/s hierarchical levels
Platform: | Size: 140539 | Author: | Hits:

[Driver Develope1-10

Description: 芯片bt8237的底层驱动,实现E1/T1帧的构建-chip bt8237 the bottom drive to achieve E1/T1 Frame Construction
Platform: | Size: 37888 | Author: 刘勇 | Hits:

[Program docG0704E

Description: ITU规范G.704。E1帧结构定义。Synchronous frame structures used at 1544, 6312, 2048, 8448 and 44 736 kbit/s hierarchical levels-ITU specification G.704. E1 frame structure definition. Synchronous frame structures used at 1544, 6312, 2048, 8448 and 44 736 kbit/s hierarchical levels
Platform: | Size: 140288 | Author: | Hits:

[Windows Developsdh

Description: SDH是现代光纤通信中广泛应用的数据传输格式,在SDH帧结构中,前9列为开销字节,它包含了很多重要的信息,本程序为SDH开销的接收处理,查找帧头,分频,勤务话字节E1异步fifo。可拆为三段源代码,不知道能不能抵三个程序-SDH is a modern optical fiber communication is widely used in data transmission format, in the SDH frame structure, as the former 9 overhead bytes, it contains a lot of important information, the procedures for receiving SDH overhead processing, search header, sub-frequency ,勤務if E1 asynchronous byte fifo. Removable for three source code, I do not know the three procedures can be arrived
Platform: | Size: 6144 | Author: 韩冰 | Hits:

[VHDL-FPGA-VerilogSDHAnalysis

Description: 光纤通信中的SDH数据帧解析及提取的VHDL实现源代码,共包含帧同步、E1及F1码流提取、DCC1码流提取、帧头开销串行输出四个主要模块-SDH fiber-optic communication data frame analysis and retrieval implementation of VHDL source code, include the frame synchronization, E1 and F1 stream extraction, DCC1 stream extraction, header overhead serial output four main modules
Platform: | Size: 31744 | Author: 张晓彬 | Hits:

[VHDL-FPGA-VerilogE1

Description: 在国际标准组织开放式系统互联(OSI)参考模型下,以太网是第二层协议。10G以太网使用IEEE(电气与电子工程师学会)802.3以太网介质访问控制协议(MAC)、IEEE 802.3以太网帧格式以及IEEE 802.3最小和最大帧尺寸。-In the International Standards Organization Open Systems Interconnect (OSI) reference model, Ethernet is the second-layer protocol. 10G Ethernet using the IEEE (Institute of Electrical and Electronics Engineers) 802.3 Ethernet Media Access Control Protocol (MAC), IEEE 802.3 Ethernet frame format, as well as the minimum and maximum IEEE 802.3 frame size.
Platform: | Size: 1723392 | Author: guoguo | Hits:

[VHDL-FPGA-VerilogE1

Description: 分析帧同步算法,提供帧同步的状态机实现图以及得到的正确仿真图形。-Analysis of frame synchronization algorithm, to provide frame synchronization state machine implementation plans and get the correct simulation graphics.
Platform: | Size: 96256 | Author: 李逊 | Hits:

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