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[Linux-Unixe1

Description: e1 framer
Platform: | Size: 2203 | Author: eric@meganovo.com | Hits:

[Other Embeded programDS26528_Rev_A3_10-10-05

Description: Sample driver code for Dallas DS26528 T1/E1 framer chip.
Platform: | Size: 485376 | Author: Matthew | Hits:

[OtherE1-FramerDeframer

Description: E1 Framer/Deframer,E1 framer Deframer core implements CCITT (ITU) recommedations G.704,G.706 and G.732 for 30 channel multiplexed E1 stream at 2.048Mbps rate. Note:This project is part of the OpenStacks initiative at the Telecom Software Laboratory, Electrical Engineering Department / Bharti School of Telecommunication Technology & Management. The initiative is founded and led by Dr.Subrat Kar (subrat@ee.iitd.ac.in) at the Department of Electrical Engineering, IIT Delhi-E1 Framer/Deframer, E1 framer Deframer core implements CCITT (ITU) recommedations G.704, G.706 and G.732 for 30 channel multiplexed E1 stream at 2.048Mbps rate. Note: This project is part of the OpenStacks initiative at the Telecom Software Laboratory, Electrical Engineering Department/Bharti School of Telecommunication Technology & Management. The initiative is founded and led by Dr.Subrat Kar (subrat@ee.iitd.ac.in) at the Department of Electrical Engineering, IIT Delhi
Platform: | Size: 139264 | Author: xiao | Hits:

[VHDL-FPGA-VerilogE1framerDeframer

Description: e1 framer and defremerr vhdl cods
Platform: | Size: 45056 | Author: rez | Hits:

[Modem programe1framer_latest.tar

Description: e1-framer for developing E-1 modems
Platform: | Size: 2048 | Author: anvesh | Hits:

[matlabmt9075b

Description: MT9075为E1接口芯片 MT9075为E1接口芯片-Combined pcm30 framer,line interface unit and link controllers in a 68pin PLCCor 100 pin MQFPpackage
Platform: | Size: 240640 | Author: 老赵 | Hits:

[Communication-Mobilemuxdemux_4E1(E2)_to_1E2(E3)

Description: framer Deframer core multiplexed 4 E1(E2)channel s to one E2(E3) stream at 8.448Mbps(34.368Mbps) rate .
Platform: | Size: 3072 | Author: Oleg | Hits:

[VHDL-FPGA-Veriloge1framerdeframer

Description: E1 Framer/De-Framer, Also include the data check (CRC) and channel coding/decoding-E1 framer and deframer, clock adjust, clock phase adjust
Platform: | Size: 17408 | Author: 章容 | Hits:

[VHDL-FPGA-Veriloge1framerdeframer

Description: E1成帧器和解帧器的FPGA实现源码,测试可用-E1 Framer deframer
Platform: | Size: 35840 | Author: lijunwen | Hits:

[VHDL-FPGA-Veriloge1-framer

Description: e1 framer / de-framer based on itu-t standards state machine using GRAY CODE (or trying to use GRAY CODE
Platform: | Size: 3072 | Author: aa | Hits:

[VHDL-FPGA-Veriloge1framerdeframer_latest.tar

Description: E1 framer logic implementaion
Platform: | Size: 17408 | Author: tjayaprakash | Hits:

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