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[Other resource] dianti

Description: Verilog在maxpuls2下开发的电梯控制器的文档（包括代码），其中说明十分详尽-Verilog maxpuls2 under development in the elevator controller files (including code), It showed very detailed
Platform: | Size: 74200 | Author: 余远恒 | Hits:

[VHDL-FPGA-Verilog] crc_16

Description: 循环冗余校验，crc_16,主要运用在数字通信系统。用Verilog HDL编写。-Cyclic Redundancy Check, crc_16, mainly used in digital communications systems. Prepared with Verilog HDL.
Platform: | Size: 31744 | Author: 李鹏 | Hits:

[VHDL-FPGA-Verilog] dianti

Description: Verilog在maxpuls2下开发的电梯控制器的文档（包括代码），其中说明十分详尽-Verilog maxpuls2 under development in the elevator controller files (including code), It showed very detailed
Platform: | Size: 73728 | Author: 余远恒 | Hits:

[VHDL-FPGA-Verilog] verilog_dianti

Description: 一组两个电梯的控制器，希望对初学Verilog硬件描述语言的人有帮助。-One group of two elevator controller, in the hope of learning Verilog hardware description language help.
Platform: | Size: 3072 | Author: zz | Hits:

[VHDL-FPGA-Verilog] lift_controler-verilog

Description: 用verilog写的电梯控制器，内附测试文件和实验报告-Using Verilog to write elevator controller, containing the test documentation and test reports
Platform: | Size: 665600 | Author: jia | Hits:

[VHDL-FPGA-Verilog] practical_lift_controller

Description: practical_lift_controller 实用电梯控制器 实用电梯控制系统block symbol file 实用电梯控制器的Verilog HDL程设计-practical utility practical_lift_controller elevator controller elevator control system block symbol file utility elevator controller Verilog HDL-way design
Platform: | Size: 1233920 | Author: | Hits:

[VHDL-FPGA-Verilog] ThreeSimulatedElevator

Description: 我们的课程设计,三层电梯控制器模拟程序.用verilog HDL语言编写-Our curriculum design, three-elevator controller simulation program. Verilog HDL language used
Platform: | Size: 11264 | Author: 江欣达 | Hits:

[VHDL-FPGA-Verilog] dianti

Description: 电梯控制器程序设计 六层楼 含有详细解释以及波形-Elevator controller program design containing six-storey buildings, as well as a detailed explanation waveform
Platform: | Size: 161792 | Author: 龙丽丽 | Hits:

[VHDL-FPGA-Verilog] VerilogHDL

Description: 完整的九层电梯控制器verilog源代码-Complete nine-story elevator controller Verilog source code
Platform: | Size: 1310720 | Author: 周依婷 | Hits:

[VHDL-FPGA-Verilog] dianti

Description: 用verilog写的电梯控制器内附测试文件和实验报告 -Use verilog to write elevator controller with the test documentation and test reports
Platform: | Size: 668672 | Author: 黎德才 | Hits:

[VHDL-FPGA-Verilog] dualelevatorcontroller

Description: Verilog code for dual elevator controller. contains code for the controller of dual elevator for a building with 4 floors. the test bench is also present
Platform: | Size: 4096 | Author: JK | Hits:

[VHDL-FPGA-Verilog] lift_control

Description: 利用Verilog设计的电梯控制器代码，通过QUARTUS进行仿真-Elevator controller design using Verilog， simulation by QUARTUS
Platform: | Size: 488448 | Author: 王阳 | Hits:

[VHDL-FPGA-Verilog] lift_verilog

Description: 用verilog实现的电梯控制器，代码中有详细的注释说明，是学习rtl设计很好的资料-The elevator controller using verilog implementation, the code has detailed notes, is good datum to learn rtl design
Platform: | Size: 11264 | Author: | Hits:

[VHDL-FPGA-Verilog] elevator

Description: 三个八层电梯的控制器，verilog实现。内附有详细设计文档及源码。-The controller of three 8-level elevators, designed with Verilog. The design is detailedly represented in the DOC as well as the source code.
Platform: | Size: 272384 | Author: cc | Hits:

[Windows Develop] Veleevzipe

Description: Verilog 电梯控制器设计 设计一个八层楼房自动电梯控制器，用八个 LED显示出来电梯行进过程，并有数码管显示出来电梯当前所在楼层位置，在每层电梯入口处设有请求按钮开关，请求按钮按下则相应楼层的的LED 亮亮。 用 CLK脉冲控制电梯运动，每来一个 CLK脉冲电梯升（降）一层。电梯到达有请求的楼层后，该层次的指示灯灭，电梯门打开（开门指示灯亮），开门 5 秒后，电梯门自动关闭，电梯继续运行。 -Automatic elevator controller Verilog elevator controller design design an eight-story buildings with eight LED display out of the elevator moving process, and a digital display out of the elevator where the floor position with Request button switch on each elevator entrance, the request button is pressed the corresponding floors LED bright. CLK pulse to control the elevator movement, each to a CLK pulse elevator up (down) layer. The elevator to reach the requested floor, the level of the indicator off, the elevator door open (door lights), open the door five seconds after the elevator doors close automatically, the elevator continues to run.
Platform: | Size: 76800 | Author: leyuan | Hits:

[VHDL-FPGA-Verilog] elevator-verilog-code

Description: SRAM CONTROLLER CAN GIVE YOU CORRET IDEA ABOUT VERILOG
Platform: | Size: 24576 | Author: DOSASPATRUNI SIVA | Hits:

[VHDL-FPGA-Verilog] elevator_controller

Description: 采用verilog写的四层电梯控制程序，有相应的图片，报告，容易理解-Elevator controller program of four floors use the Verilog, and it includes paper and picture,and it is very easy understand.
Platform: | Size: 1277952 | Author: maogang | Hits:

[Other] elevator

Description: 用Verilog代码进行电路设计，并在指定可编程FGPA芯片上实现电梯控制器的功能，要能够对多个楼层的请求作出判断。用七段显示器显示当前楼层，led灯表示当前电梯是上还是下状态。-Performed using Verilog code circuit design and realization of the function is specified on the elevator controller chip programmable FGPA, to be able to make a judgment on the request multiple floors. With a seven-segment display shows the current floor, led lights indicate the current state of the elevator is on or under.
Platform: | Size: 188416 | Author: 罗碧 | Hits:

[Other] 69122349lift_controler-verilog

Description: 实现电梯控制，一到七楼，通过led实现层数，数码管显示数字。(Through simulating elevator hoistway information, elevator controller is tested and assessed)
Platform: | Size: 664576 | Author: 不悔妹妹 | Hits:

[VHDL-FPGA-Verilog] 电梯控制器报告(Verilog实现)

Description: 实现一个简单的电梯控制器,能够完成一个四层电梯的控制(The realization of a simple elevator controller, to complete a four storey elevator control)
Platform: | Size: 16393216 | Author: 星空微尘 | Hits:
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