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[VHDL-FPGA-Verilogcrc_16

Description: 循环冗余校验,crc_16,主要运用在数字通信系统。用Verilog HDL编写。-Cyclic Redundancy Check, crc_16, mainly used in digital communications systems. Prepared with Verilog HDL.
Platform: | Size: 31744 | Author: 李鹏 | Hits:

[VHDL-FPGA-Verilog6FloorLift

Description: 设计一个6层电梯控制器。电梯控制器是按照乘客的要求自动上、下的装置。 1、每层电梯入口处设置上下请求开关,电梯内设有顾客到达层次的停站请求开关。 2、设有电梯所处位置指示装置以及电梯运行模式(上升或者下降)指示装置。 3、电梯每秒升降一层楼。 4、电梯到达有停站请求的楼层,经过1秒电梯门打开,开门4秒后,电梯门关闭(开门指示灯灭),电梯继续运行,直至执行完最后一个请求信号后停留在当前层。 5、电梯能记忆电梯内外所有请求信号,并按照电梯运行规则按顺序响应,每个请求信号保留至有电梯响应后消除。 6、初始状态为一层开门,第一层不用向下开关,最高层不用向上开关。 7、电梯运行规则:当电梯上升时,只响应比电梯所在位置高的上楼请求信号,由下而上逐个执行,直到最后一个上楼请求执行完毕;如果高层有下楼请求,则直接升到下楼请求的最高楼层,然后进入下降模式。当电梯处于下降模式时与上升正好相反。 -design of a six-story elevator controller. Elevator Controller in accordance with the requirements of passengers automatically, the device. 1, installed on each floor elevator entrance next request switches, elevator begins to reach the level of customer stops request switch. 2, the location of elevator and escalator installations instructions operation mode (up or down) device instructions. 3, Elevator per second floor landing. 4, the lift reached a request stops floors seconds after an elevator doors open door four seconds later, elevator doors closed (to open the door to eliminate light), the continued operation of the lift, End until the implementation of the final request for a signal to stay in the current layer. 5, the lift will lift internal and external memory signal to all reques
Platform: | Size: 2048 | Author: zheng | Hits:

[VHDL-FPGA-Veriloglift_VHDLDocument

Description: 用VHDL描述的电梯运行程序,代码注释很详细,希望对大家有帮助-VHDL description of the elevator used to run programs, code comment in great detail, I hope all of you help
Platform: | Size: 162816 | Author: ninghuiming | Hits:

[Software EngineeringAutomatic_elevator_control_circuit

Description: 设计一个四层楼房全自动电梯控制电路,每层电梯入口设有上下请示开关各一个 VHDL语言 已测试-The design of a four-storey building in automatic elevator control circuits, each elevator entrance with upper and lower switches of the instructions have been tested a VHDL language
Platform: | Size: 17408 | Author: fanshixuan | Hits:

[VHDL-FPGA-VerilogEDAdeisgn(2)

Description: 该文件中是关于一些VHDL许多编程实例以及源码分析,希望对VHDL爱好者有用。卷2实例包括:多路彩灯控制器的设计与分析、智力抢器的设计与分析、微波炉控制器、数据采集控制系统、电梯控制器的设计与分析-The document is on a number of VHDL source code in many programming examples and analysis, in the hope that useful VHDL enthusiasts. Volume 2 Examples include: multi-way lantern controller design and analysis, intelligence steal the design and analysis, microwave oven controller, data acquisition and control systems, elevator controller design and analysis
Platform: | Size: 4952064 | Author: shengm1 | Hits:

[Other systemselevator

Description: 电梯控制器 可实现电梯上下响应任务,到站提示音,无任务停在基站-Elevator controller can realize the lift up and down in response to mission departure and arrival tone, non-mission stopped at the base station
Platform: | Size: 1024 | Author: hilly | Hits:

[Software Engineering1041000202

Description: 一篇关于电梯的毕业设计论文 写的很规范 很详细 有一定的参考价值-An article on the design of elevator graduation thesis is written in a very detailed specification of some reference value
Platform: | Size: 841728 | Author: lc | Hits:

[VHDL-FPGA-Verilogok003

Description: vhdl应用汇编所写的关于电梯的详细程序-Applications written in VHDL compilation of detailed procedures on the elevator
Platform: | Size: 1024 | Author: 卢海泉 | Hits:

[OtherLift_Controller

Description: 这个文件包含了我前一段写的关于3~8电梯控制的4-5个程序!并且附有比较详细的注释.准确说这是一份课程设计报告.在最终版本的程序中对于FLEX10K系列器件只占用141个逻辑单元,频率可达60多Mhz,选择CycloneII器件可达260多Mhz.因为包含了好几个程序,希望站长不要只安一个程序处理,能及时开通!-This document contains a section of my previous writing on the 3 to 8 elevator control procedure of 4-5 months! And accompanied by more detailed notes. Accurately say that this is the report of a curriculum design. In the final version of the program for FLEX10K Series devices occupy only 141 logic cells, the frequency can reach more than 60 Mhz, choose up to CycloneII device more than 260 Mhz. because contains several procedures and not just head of a security procedure, which opened in time!
Platform: | Size: 898048 | Author: jesse | Hits:

[VHDL-FPGA-VerilogLift

Description: VHDL编写的6层电梯控制器,可在Altera的CPLD系统运行实验,内附实验报告-VHDL prepared 6-storey elevator controller in Altera s CPLD system experiment, experimental report containing
Platform: | Size: 770048 | Author: 许昕 | Hits:

[VHDL-FPGA-VerilogElevator

Description: 基于FPGA的6层电梯控制器,使用VHDL编程,用quartus ii进行仿真模拟-Elevator Controller
Platform: | Size: 162816 | Author: xieyi | Hits:

[VHDL-FPGA-Veriloglift

Description: (1)用VHDL实现四层电梯运行控制器。 (2)电梯运行锁用一按钮代替(开锁上电),低电平可以运行,高电平不能运行。 (3)每层电梯入口处设有上行、下行请求按钮,电梯内设有乘客到达层次的停站要求开关,高电平有效。 (4)有电梯所处楼层指示灯和电梯上行、下行状态指示灯。 (5)电梯到达某一层时,该层指示灯亮,并一直保持到电梯到达另一层为止。电梯上行或下行时,相应状态指示灯亮。 (6)电梯接收到停站请求后,每层运行2秒,到达停站层,停留2秒后门自动打开,开门指示灯亮,开门6秒后电梯自动关门。 (7)能记忆电梯内、外的请求信号,并按照电梯的运行规则依次响应,请求信号保留至响应后撤除。 (8)人数超载或超重用一按钮代替,高电平有效,超载时电梯不能运行,并有相应指示。 (9)事故报警按钮高电平有效,事故报警不能运行,并有指示灯,信号保留至事故消除 -(1) the realization of four-storey elevator with VHDL controller operation. (2) elevator button with a lock to run in place of (unlock power), low run, can not run high. (3) on each floor with elevator at the entrance to the uplink, downlink request button, which are equipped with passenger elevators to reach the level of the requirements of stoppings switch, high effective. (4) elevators and escalators which lights up the floor, down the state indicator. (5) elevator to reach a certain level, the level indicator light, and has remained until the elevator arrived at another level. Elevator uplink or downlink, the corresponding status indicator light. (6) Elevator stops receiving a request, each running two seconds to reach the stops layer, two seconds back door stay open automatically, open the door indicator light, 6 seconds after the elevator door closed automatically. (7) to memory elevator inside and outside the request signal, and in accordance with the rules followed
Platform: | Size: 289792 | Author: 管皮皮 | Hits:

[VHDL-FPGA-Veriloglift.vhd

Description: 用VHDL实现了电梯的模拟程序,实现了自动判断楼层,然后根据客户需求和楼层最近原则,实现自动判断上下行,还有报警,强制开门等功能-Achieved using VHDL elevator simulation program, to determine the realization of an automatic floor, and then based on the principle of demand and the floor recently, automatically determine the next line, as well as alarm, forced open the door and other features ~ ~
Platform: | Size: 1024 | Author: 董灏 | Hits:

[VHDL-FPGA-Verilogdiantikongziqi

Description: 电梯控制器的设计与分析.对电梯的控制过程进行VHDL语言描述。-Elevator controller design and analysis. On the elevator control process described in VHDL language.
Platform: | Size: 421888 | Author: 水牛EDA | Hits:

[VHDL-FPGA-VerilogElevator_controller

Description: 电梯控制器VHDL程序与仿真,程序注释详细,可读性强。-Elevator controller and simulation of VHDL program, the program notes in detail, strong readability.
Platform: | Size: 161792 | Author: | Hits:

[Software EngineeringVHDL_fire_alarm_detection

Description: vhdl source code of fire detection system/fire alarm system especially for high rise building? This among the requirement :- according to my "fire detection system for tall building" project by using Spartan 3E FPGA, the vhdl program need to include all of dis specification:- First of all, we ll put sensor/smoke detector each floor in the tall building. 1) alarm ll activated if the sensor/smoke detector sense a fire 2)at the same time, the actuator will activate in order to control such a elevator and any other machines in the building. 3)the controller will display which floor caught by fire and the sensor/smoke detector initial or current temperature. 4)If there is false alarm, we can stop it by push the reset button .-vhdl source code of fire detection system/fire alarm system especially for high rise building? This is among the requirement :- according to my "fire detection system for tall building" project by using Spartan 3E FPGA, the vhdl program need to include all of dis specification:- First of all, we ll put sensor/smoke detector each floor in the tall building. 1) alarm ll activated if the sensor/smoke detector sense a fire 2)at the same time, the actuator will activate in order to control such a elevator and any other machines in the building. 3)the controller will display which floor caught by fire and the sensor/smoke detector initial or current temperature. 4)If there is false alarm, we can stop it by push the reset button .
Platform: | Size: 1024 | Author: subin | Hits:

[VHDL-FPGA-Verilogfilipe

Description: Elevator description in VHDL
Platform: | Size: 293888 | Author: filipe g teixeira | Hits:

[VHDL-FPGA-Verilogvhdlcodeforelevator

Description: Elevator programme in Vhdl
Platform: | Size: 162816 | Author: Nitin | Hits:

[VHDL-FPGA-Verilog16DIANTIKONGZHI

Description: 16层电梯控制VHDL程序 内含各个模块的程序-16 floors of elevator control program includes modules in VHDL program
Platform: | Size: 2048 | Author: 李灿 | Hits:

[VHDL-FPGA-Verilogelevmain1

Description: this is code fro elevator in vhdl
Platform: | Size: 29696 | Author: jaimin patel | Hits:
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