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[
VHDL-FPGA-Verilog
]
fallthrough_small_fifo_v2
Description:
同步fifo设计，仿真已通过，用Verilog编写，代码短小-Synchronous fifo design, simulation has been adopted, written with Verilog, code short
Platform:
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Size:
1024
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Author:
xinghuo
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