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[Documents] fft频谱分析源程序

Description: fft频谱分析源程序 对于学习信号处理的人很重要的东西
Platform: | Size: 146453 | Author: wenhe_666 | Hits:

[Mathimatics-Numerical algorithms] Matlab、基于 MATLAB系统的信号FFT

Description: Matlab、基于 MATLAB系统的信号FFT-Matlab, based on MATLAB FFT signal system
Platform: | Size: 145408 | Author: 杨洁 | Hits:

[DSP program] 使用CCS进行DSP编程2－实现FFT

Description: 使用CCS进行DSP编程2－实现FFT，用CCS2.0在进行TI的DSP开发时，可以实现FFT的开发。-use CCS DSP programming 2-FFT with CCS2.0 during TI's DSP development, can achieve FFT development.
Platform: | Size: 437248 | Author: 穆群生 | Hits:

[DSP program] C6000 FFT编程指南

Description: C6000系列DSP FFT编程指南-C6000 DSP FFT Programming Guide
Platform: | Size: 437248 | Author: 陈旭 | Hits:

[Compress-Decompress algrithms] fft

Description: VHDL语言编写的fft变换的ip核代码 对算法感兴趣的可以-VHDL language fft transform algorithm ip core code can be interested in
Platform: | Size: 459776 | Author: liujl | Hits:

[VHDL-FPGA-Verilog] fft

Description: 16卫浮点FFT算法的VHDL实现，有测试文件。-16 floating-point FFT algorithm Wei VHDL realize, have the test paper.
Platform: | Size: 418816 | Author: | Hits:

[Software Engineering] fft

Description: 本实验的目的在于学习FFT 算法，及其在TMS320C54X 上的实现，并通过编程掌 握C54X 的存储器管理、辅助寄存器的使用、位倒序寻址方式等技巧，同时练习使用 CCS 的探针和图形工具。另外在BIOS 子目录下是一个使用DSP/BIOS 工具实现FFT 的程序。通过该程序，你可以使用DSP/BIOS 提供的分析工具评估FFT 代码执行情况。-The purpose of this study is to learn FFT algorithm and its application in the realization of TMS320C54X and through programming master C54x memory management, the use of auxiliary registers, bit reverse addressing mode, such as skills, practicing the use of CCS at the same time the probe and graphics tools . Also in the BIOS is a subdirectory using the DSP/BIOS tool to achieve the FFT procedure. Through the program, you can use the DSP/BIOS analysis tools provided to assess the implementation of FFT code.
Platform: | Size: 129024 | Author: chachafeng | Hits:

[Algorithm] FFT

Description: 实现FFT变换的C语言。便于大家在在开发时作为参考使用。
Platform: | Size: 1024 | Author: 张志峰 | Hits:

[Algorithm] FFT

Description: 基4的FFT算法程序，它是要通过将长度为N的数据序列转化成大小为4的DFT来实现高速化。从理论上讲，它比执行时间缩短为基2的FFT的3/4。该程序性能优越，可用性很强。下载即可用！-4 FFT algorithm based procedures, it is to be adopted will be a length of N data sequence into a size of 4 to achieve high-speed DFT. In theory, shorter than the execution time of FFT-based 2 of 3/4. The superior performance, availability, very strong. Can be used to download!
Platform: | Size: 1024 | Author: jojocheng | Hits:

[SCM] FFT-RM9200

Description: 西安傅立叶电子科技开发板FFT-RM9200文档和实验指导书-Xi
Platform: | Size: 4453376 | Author: liuyu | Hits:

[VHDL-FPGA-Verilog] FFT-FPGA

Description: 16位定点FFT-DSP的FPGA实现，相关代码和实用说明-16-bit fixed-point FFT-DSP realize the FPGA, the relevant code and practical description
Platform: | Size: 3834880 | Author: 杨合 | Hits:

[VHDL-FPGA-Verilog] FFT

Description: 讲解快速傅里叶变换--FFT快速算法的文章。-On Fast Fourier Transform- FFT fast algorithm for the article.
Platform: | Size: 1468416 | Author: lixu | Hits:

[JSP/Java] FFT

Description: Java数字图像处理，对图像进行FFT变换-Java digital image processing, image transform FFT
Platform: | Size: 64512 | Author: 张峰 | Hits:

[VHDL-FPGA-Verilog] 16Point-FFT

Description: 16点FFT VHDL源程序，The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input data is a vector of 16 complex values represented as 16-bit 2’s complement numbers – 16-bits for each of the real and imaginary component of a datum.-16:00 FFT VHDL source code, The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input datais a vector of 16 complex values represented as 16-bit 2 s complement numbers- 16-bits foreach of the real and imaginary component of a datum.
Platform: | Size: 1824768 | Author: qiyuan | Hits:

[DSP program] fft

Description: TMS320F2812 512点的FFT程序 给定14比特AD采样数据-TMS320F2812 512 point FFT procedure given 14-bit AD sampling data
Platform: | Size: 58368 | Author: | Hits:

[Software Engineering] FPGA_4FFT

Description: 针对高速数字信号处理的要求,提出用FPGA 实现基- 4FFT 算法,并对其整体结构、蝶形单 元进行了分析. 采用蝶算单元输入并行结构和同址运算,能同时提供蝶形运算所需的4 个操作 数,具有最大的数据并行性,能提高处理速度 按照旋转因子存放规则,蝶形运算所需的3 个旋转 因子地址相同,且寻址方式简单 输出采取与输入相似的存储器 运算单元同时采用3 个乘法的 复数运算算法来实现.-In accordance with the requirements of high speed digital signal processing , the algorithmof radix O4 implemented with FPGA and the integrated architecture and butterfly unit are analyzed. With butterfly u2 nit input which is designed by parallel structure and the same address calculation , four operation codes the butterfly unit needs can be provided simultaneously to have the most data parallel and improve the speed of calculation. According to the rotation parameters memory regulation , the addresses of three rotation parame2 ters of butterfly unit are the same with simple style of address generation and similar input and output memo2 ries. The operating unit adopted is implemented by three complex calculation algorithm of multiplication si2 multaneously.
Platform: | Size: 360448 | Author: 王晓 | Hits:

[VHDL-FPGA-Verilog] fft

Description: an fft implementation help
Platform: | Size: 316416 | Author: amer | Hits:

[Algorithm] FFTwebpagepickup

Description: 基于FFT的网页正文提取算法。 涉及到快速傅立叶变换-base FFT web page text pick up
Platform: | Size: 190464 | Author: zm | Hits:

[JSP/Java] fft

Description: java 实现的 快速傅立叶变换 ，用于图像处理-FFT
Platform: | Size: 4096 | Author: zz | Hits:

[Other] fft

Description: 改进的FFT算法研究。不错的学习材料。欢迎下载-Improved FFT algorithm. Good learning materials. Welcome to download
Platform: | Size: 152576 | Author: 胡 | Hits:
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