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Description: 一篇用VHDL实现快速傅立叶变换的论文,包括原理分析和代码实现,印度圣雄甘地大学M.A.学院提供-VHDL with a Fast Fourier Transform papers, including the principle of analysis and implementation of the code, the Mahatma Gandhi Institute of the University of Marat
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Size: 62464 |
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Description: FFT的VHDL源代码的实现与仿真结果,经过FPGA源型机验证,已通过-FFT VHDL source code and the realization of simulation results, after FPGA source aircraft certification, have passed
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Size: 62464 |
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Description: FFT算法的VHDL语言实现
可在Modelsim上运行和调试 -FFT algorithm VHDL in the operation and Modelsim Debugging
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Size: 29696 |
Author: 紫蓝 |
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Description: 解决FFT的编程问题,赶紧下啊~~很 好的,真的,不过不是我编的,高手那转的!-FFT to solve programming problems, quickly, under ah ~ ~ very good, really, but I am not prepared, and master it turn!
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Size: 1024 |
Author: 王斌 |
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Description: VHDL 的FFT 1024点源码。既有VHDL 的,也有Verlog的。比较好用。占用资源少-VHDL source code of the FFT 1024 points. Both VHDL and there are also some of the Verlog. Comparison of ease of use. Occupy less resources
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Size: 37888 |
Author: 张加良 |
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Description: 电赛一等奖作品:音频信号分析仪的FPGA源码,VHDL编写,Quartus7.1综合,ModelSim6.2g se仿真,应用了opencores.org上的开源FFT IP核,加入了8051总线接口和ram-Xinhua Cup first prize works: audio signal analyzer FPGA source, VHDL prepared, Quartus7.1 integrated, ModelSim6.2g se simulation, application of open source opencores.org on FFT IP core, joined the 8051 bus interface and ram
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Size: 4933632 |
Author: 李星 |
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Description: Design Simulation and synthesis of a fft processor using VHDL
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Size: 362496 |
Author: lys |
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Description: 16位定点FFT-DSP的FPGA实现,相关代码和实用说明-16-bit fixed-point FFT-DSP realize the FPGA, the relevant code and practical description
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Size: 3834880 |
Author: 杨合 |
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Description: cordic verilog 程序及仿真结果 8级流水线-cordic verilog simulation results procedures and eight lines
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Size: 1024 |
Author: elisen |
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Description: 附件代码实现了基4FFT的碟形单元运算,是FFT算法的核心部分,并且此碟形单元运算是基于浮点运算的-Annex code base of the dish 4FFT computing unit is the core of the FFT algorithm, and this dish is based on the computing unit of the floating-point operations
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Size: 4096 |
Author: 钟毓秀 |
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Description: Unity Gain Cascaded IFFT and FFT Pair Design Example v7.2
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Size: 10240 |
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Description: 16点FFT VHDL源程序,The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input data
is a vector of 16 complex values represented as 16-bit 2’s complement numbers – 16-bits for
each of the real and imaginary component of a datum.-16:00 FFT VHDL source code, The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input datais a vector of 16 complex values represented as 16-bit 2 s complement numbers- 16-bits foreach of the real and imaginary component of a datum.
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Size: 1824768 |
Author: qiyuan |
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Description: fft代码,采用蝶形算法,包括C,matlab和verilog代码-fft code, using butterfly algorithm, including C, matlab and Verilog code
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Size: 47104 |
Author: 陈 |
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Description: 基于VHDL的FFT的实现,介绍FFT的软硬件实现,并有附图-The FFT based on the realization of VHDL to introduce hardware and software realization of FFT, and graph
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Size: 91136 |
Author: 任杏 |
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Description: System generator code for fft implementation. Pls enjoy it
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Size: 23552 |
Author: phuc |
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Description: fft reciever and it can also be work as ifft transmitter
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Size: 23552 |
Author: nifrad |
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Description: this will give details of fft and ifft implementation in vhdl codes, and then on fpga chip
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Size: 3760128 |
Author: ARUN AGARWAL |
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Description: vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project
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Size: 364544 |
Author: tejaswini |
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Description: 基于VHDL语言编写的FFT程序,256点,旋转因子存在自己编写的ROM里面,乘法器和数据存储采用的是IP核-FFT-based program written in VHDL, 256 points, there is rotation factor which I have written the ROM, multiplier, and data storage is used in IP core
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Size: 6144 |
Author: 胡佳 |
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Description: 其主要使用verilog编写fft程序主体,之后通过quartus和matlab实现对fft程序的测试,可以很好做到自动化验证(The main use of verilog prepared fft main program, and then achieved by quartus and matlab fft program testing, you can do a good job of automated verification)
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Size: 995328 |
Author: 未曾走远 |
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