Description: FIR滤波器的行为级VHDL源代码,可以任意修改滤波器级数,滤波器系数的精度为16比特。-FIR filter behavioral VHDL source code, which could be amended filter series. The filter coefficients for the 16-bit accuracy. Platform: |
Size: 1024 |
Author:郭兴波 |
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Description: filter-vhdl-code.rar为滤波器的完整VHDL程序,可用于IIR与FIR滤波器的仿真与验证实现,包括代码综合。使用版本为ISE6.3.-filter-vhdl-code.rar for the integrity of filter VHDL procedures, can be used for IIR and FIR filters realize simulation and verification, including an integrated code. Use version ISE6.3. Platform: |
Size: 173056 |
Author:petri |
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Description: 產生你所需要的FIR濾波器,可以產生VHDL格式之源碼。-Have you need FIR filter, can generate VHDL source code format. Platform: |
Size: 368640 |
Author:hcjian |
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Description: fir滤波器-verilog,基于verilog的fir滤波器源码-fir filter-verilog, the fir filter based on the Verilog source code Platform: |
Size: 742400 |
Author:zhc |
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Description: 本文主要分析了FIR数字滤波器的基本结构和硬件构成特点,简要介绍了FIR滤波器实现的方式优缺点 结合Altera公司的Stratix系列产品的特点,以一个基于MAC的8阶FIR数字滤波器的设计为例,给出了使用Verilog硬件描述语言进行数字逻辑设计的过程和方法,并且在QuartusⅡ的集成开发环境下编写HDL代码,进行综合 利用QuartusⅡ内部的仿真器对设计做脉冲响应仿真和验证。-This paper analyzes the FIR digital filter structure and the basic hardware features, a brief introduction of the FIR filter the way to achieve the advantages and disadvantages of combining Altera s Stratix series of characteristics of the product, with a MAC based on the 8-order FIR digital filter design For example, given the use of Verilog hardware description language for digital logic design process and methods, and Quartus Ⅱ integrated development environment, prepared HDL code, for comprehensive utilization of Quartus Ⅱ emulator internal design so the impulse response simulation and verification. Platform: |
Size: 79872 |
Author:sundan |
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Description: code for fir filter see it is from altera site.-code for fir filter see it is from altera site.
Platform: |
Size: 26624 |
Author:bris |
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Description: 数字电路设计中的,fir滤波器设计,我做的是8位宽的,利用vhdl实现,附带了完整的代码,报告,我没有对我的信息进行删除,是希望大家能够诚实的利用这个代码,提高自身本领。-Digital circuit design, fir filter design, I am doing is 8 bits wide, using vhdl implementation, with a complete code, the report, I did not delete my information in the hope that we can use this code for an honest to improve their skills. Platform: |
Size: 3322880 |
Author:de de |
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Description: 一种基于verilog的fir滤波源码,并带matlab仿真源程序。-Based on the fir filter verilog source code and source code with matlab simulation. Platform: |
Size: 23552 |
Author:对称 |
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Description: 此代码为FIR滤波器的设计源码,并对其代码做了相应的改进,综合仿真结果成功-This code source code for the FIR filter design, and the code does a corresponding improvement, integrated simulation results successfully
Platform: |
Size: 2048 |
Author:飞扬奇迹 |
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Description: 基于FPGA的17阶FIR滤波器VHDL代码。文件附带了FIR数字滤波器理论的介绍。-FPGA-based 17-order FIR filter VHDL code. File with the FIR digital filter theory introduction. Platform: |
Size: 919552 |
Author:周鑫 |
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