Search - flash controller verilog

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[Other resource] flash接口控制_verilog DL : 0: flash接口控制器的VHDL以及verilog源代码和Testbench程序-flash interface controller VHDL and Verilog source code and procedures Testbench
Update : 2008-10-13 Size : 850.2kb Publisher : 李楠
[VHDL-FPGA-Verilog] flash接口控制_verilog DL : 0: flash接口控制器的VHDL以及verilog源代码和Testbench程序-flash interface controller VHDL and Verilog source code and procedures Testbench
Update : 2025-02-17 Size : 850kb Publisher : 李楠
[VHDL-FPGA-Verilog] sdram DL : 0: sdram控制器这里考虑将SDRAM控制器结合目前项目开展来做相应的模块，而不做SDRAM通用控制器，这样也是考虑了FPGA的器件资源而采取的措施。同时编写的逻辑简单，没有多余的逻辑资源有利于提高控制器的速度，满足最后的设计要求。-SDRAM controller here consider SDRAM controller current projects do the corresponding module, but not so common SDRAM controller, as well as consider the FPGA device resources and the measures taken. While the preparation of simple logic, the logic is no spare resources to improve the speed controller to meet the final design requirements.
Update : 2025-02-17 Size : 3kb Publisher : 林博
[VHDL-FPGA-Verilog] bch_encoder_decoder DL : 0: bch encoder+decoder 源代码，Flash控制器，通讯都需要用到哦-bch encoder+ decoder source code, Flash controller, communications are needed Oh
Update : 2025-02-17 Size : 133kb Publisher : linchan
[VHDL-FPGA-Verilog] hdl DL : 1: 用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制-Using Verilog languages realize NAND Flash block to control access as well as the synchronization FIFO control
Update : 2025-02-17 Size : 6kb Publisher : 刘义春
[VHDL-FPGA-Verilog] SST39VF3201 DL : 0: flash interface controller, verilog coding
Update : 2025-02-17 Size : 292kb Publisher : jason
[VHDL-FPGA-Verilog] wb_flash_latest[1].tar DL : 0: flash 控制器，用verilog描述，希望对大家有帮助-flash controller!
Update : 2025-02-17 Size : 2kb Publisher : 罗锋
[VHDL-FPGA-Verilog] spasion_flash_verilog_model DL : 0: verilog模型,用于仿真flash，可以快速地看懂-verilog model for flash controller specified for spasion flash, please download it look at it
Update : 2025-02-17 Size : 221kb Publisher : jiangwen
[Other] altera_nand_controller DL : 0: Altera合作伙伴Eureka Technology.和Cast Inc.为Altera FPGA芯片定制的Nand flash controller IP core-Altera partner Eureka Technology. And the Cast Inc. For the Altera FPGA chip custom Nand flash controller IP core
Update : 2025-02-17 Size : 290kb Publisher : Trevor
[VHDL-FPGA-Verilog] NAND_Flash_Controller DL : 0: FPGA实现的NandFlash控制器（带ECC）文档+源代码。-FPGA implementation NandFlash controller (with ECC) document+ source code.
Update : 2025-02-17 Size : 1.51mb Publisher : 李银
[VHDL-FPGA-Verilog] NandFlash-FPGA-controller(ECC) DL : 2: 该压缩包包括NAND FLASH（美光）的FPGA控制器的原理及VHDL源码，非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference.
Update : 2025-02-17 Size : 1.51mb Publisher : 张明利
[VHDL-FPGA-Verilog] NANDController DL : 0: verilog编写的nand flash的控制程序 -nand flash controller based on verilog
Update : 2025-02-17 Size : 18kb Publisher : 刘志超
[VHDL-FPGA-Verilog] isp_top DL : 0: verilog编写的spi flash控制器-written spi flash controller verilog
Update : 2025-02-17 Size : 61kb Publisher : 杨奔
[VHDL-FPGA-Verilog] QUAD-SPI-verilog DL : 2: 难得的SPI NOR Flash控制器Verilog源代码，支持四路串行通道！-Rare SPI NOR Flash controller Verilog source code, supports four serial channels!
Update : 2025-02-17 Size : 108kb Publisher : david
[VHDL-FPGA-Verilog] 74serie-code DL : 0: 74系列的源代码里面还包含了testbench和详细的代码说明-Prepared by flash controller vhdL source code. Contains testbench. Programming Language:VHDL, Tags:VHDL-FPGA-Verilog,
Update : 2025-02-17 Size : 2.63mb Publisher : 赵亮兵
[Other] NandController(lattice) DL : 0: NAND Flash控制器源码 Verilog-NAND Flash controller source Verilog
Update : 2025-02-17 Size : 571kb Publisher : wang
[Other] SPI-NOR-Flash-controller DL : 0: 难得的SPI NOR Flash控制器Verilog源代码-A rare SPI NOR Flash controller Verilog source code
Update : 2025-02-17 Size : 109kb Publisher : liwei
[VHDL-FPGA-Verilog] SPI-NOR-Flash-controller-Verilog DL : 0: SPI NOR Flash控制器Verilog源代码-SPI NOR Flash controller Verilog
Update : 2025-02-17 Size : 108kb Publisher : 卫进
[Other] flash DL : 0: flash控制器的verilog代码，有点用-flash controller
Update : 2025-02-17 Size : 6kb Publisher : liujie
[VHDL-FPGA-Verilog] FPGA_flash设计 DL : 0: 我们的设计是用一个FSM控制器来控制发送什么命令，flash模块判断FSM发送过来的state信号来选择应该执行什么操作，当命令写入或者读出后，会发送一个flag_done命令，这个命令让我们判断上个指令是否完成，如果完成后FAM将发送下一个命令.(Our design uses a FSM controller to control what commands are sent. The flash module judges the state signal sent by the FSM to select what operation should be performed. When the command is written or read out, a flag_done command is sent. This command lets us judge whether the last word is finished or if the FAM will be sent after completion. The next command)
Update : 2025-02-17 Size : 244kb Publisher : 硅渣渣

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