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Description: 能进行32位浮点数fft运算的VHDL描述。-can float for 32 fft Operational VHDL description.
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Size: 135365 |
Author: liuqifeng |
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Description: 用VHDL语言在CPLD/FPGA上实现浮点运算,资源多多共享,不亦乐乎!
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Size: 145491 |
Author: wangzhe |
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Description: 能进行32位浮点数fft运算的VHDL描述。-can float for 32 fft Operational VHDL description.
Platform: |
Size: 135168 |
Author: liuqifeng |
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Description: 用VHDL语言在CPLD/FPGA上实现浮点运算,资源多多共享,不亦乐乎!-VHDL language used in the CPLD/FPGA to achieve floating-point operations, resources, a lot of sharing, joy!
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Size: 145408 |
Author: wangzhe |
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Description: 基于VHDL的10位定点数转浮点数模块源代码,可综合-VHDL-based set of 10 points to float the source code modules can be integrated
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Size: 2048 |
Author: 云 |
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Description: 采用fpga做小数运算的程序,使用了三级流水线技术,这是学习流水线和定点小数乘法很好的例子!-a program of float multiply, using 3-stage pipeline technology
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Size: 1024 |
Author: xietianjiao |
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Description: 介绍关于FPGA的浮点加法器运算单元设计-Information on floating-point FPGA-adder cell design computing
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Size: 202752 |
Author: luxh |
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Description: 基于FPGA的浮点小实验 hdl 语言描述-float point based on FPGA
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Size: 1036288 |
Author: FELICITY |
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Description: float-point multiplication
standart IEEE-754
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Size: 4096 |
Author: luba |
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Description: 浮点 乘法器处理方法 在一般的计算机处理方法的修改的出来的 用vhdl语言希望有用-float mix multifly
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Size: 340992 |
Author: 李白 |
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Description: 基于FPGA的单精度浮点除法器vhdl设计程序,分模块程序。-FPGA-based single-precision floating point divider vhdl design program, sub module program.
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Size: 6144 |
Author: 陈曦 |
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Description: Floating point vhdl coding
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Size: 2048 |
Author: farnaz |
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