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[Other resource] fdividing

Description: 浮点除法子程序,可以高效率计算浮点浮点除法,程序短小精干,非常讨巧-floating-point division subroutine, high efficiency calculation float float division, procedures small and lean, very quick and easy
Platform: | Size: 9392 | Author: 张非 | Hits:

[SCM] fdividing

Description: 浮点除法子程序,可以高效率计算浮点浮点除法,程序短小精干,非常讨巧-floating-point division subroutine, high efficiency calculation float float division, procedures small and lean, very quick and easy
Platform: | Size: 9216 | Author: 张非 | Hits:

[OS program] div2

Description: 大数除法的实现算法，不仅能实现两个大数的除法，而且能实现浮点数之间以及浮点数与整数之间的除法-majority of the division algorithm, is not only able to make large numbers of division two, but to achieve a float and between integer and floating point divider between the
Platform: | Size: 241664 | Author: 赵惠 | Hits:

[SCM] asm51

Description: 51子程序库，浮点、定点、加法、减法、乘法、除法-51 subroutine library, floating point, fixed point, addition, subtraction, multiplication, division
Platform: | Size: 33792 | Author: 张燕 | Hits:

[VHDL-FPGA-Verilog] div(FLP)

Description: 是Nios II處理器下客製化指令的一個32位元浮點數除法器，可將兩IEEE 754格式的值進行相除-Nios II processors are customized instruction under a 32-bit floating-point divider can be two format IEEE 754 value division
Platform: | Size: 18432 | Author: TTJ | Hits:

[assembly language] flodiv

Description: 本程序实现标准浮点数除法。 入口参数：被除数在ARGBH1:ARGBL1:EXP1中，除数在ARGBH2:ARGBL2:EXP2中。 出口参数：结果在ARGBH1:ARGBL1:EXP1中。-This procedure to achieve the standard floating-point division. Entrance parameters: dividend in ARGBH1: ARGBL1: EXP1, the divisor in ARGBH2: ARGBL2: EXP2 in. Export parameters: the results of ARGBH1: ARGBL1: EXP1 in.
Platform: | Size: 1024 | Author: liu gang | Hits:

[VHDL-FPGA-Verilog] fudianshuyunsuan

Description: 介绍一组浮点数的运算代码，包括加减乘除运算的VHDL代码实现-Introduced a set of floating-point code of the operation, including addition and subtraction multiplication and division operations to achieve the VHDL code
Platform: | Size: 323584 | Author: jiachen | Hits:

[VHDL-FPGA-Verilog] gaojindukuaisuchufa

Description: 高精度的浮点数除法运算，基于浮点运算的FPGA实现，单精度浮点数-High-precision floating-point division operation, the FPGA based on the realization of floating-point operations, single precision floating point
Platform: | Size: 81920 | Author: jiachen | Hits:

[JSP/Java] Calculator

Description: 建议计算器，能进行浮点数的加减乘除，swing界面-Recommended calculator for floating-point addition and subtraction, multiplication and division can, swing interface
Platform: | Size: 140288 | Author: strive4future | Hits:

[OS program] fudianshu

Description: 用java编写的浮点数除法的运算，计算机组成原理课程设计-Prepared by floating-point division with java computing, computer architecture course design
Platform: | Size: 37888 | Author: caixuan | Hits:

[SCM] flodiv

Description: 本程序实现PIC标准浮点数除法。 入口参数：被除数在ARGBH1:ARGBL1:EXP1中，除数在ARGBH2:ARGBL2:EXP2中。 出口参数：结果在ARGBH1:ARGBL1:EXP1中。 占用资源：W,STATUS,020H~02BH,两重堆栈。 说 明: 1.加载本文件的同时也加载了另外2个文件"DUSUB.ASM","DUADD.ASM" 故用户在使用这2个子程序时可直接调用,不必重新加载.- This program to achieve the standard floating-point division. Entry parameters: the dividend in ARGBH1: ARGBL1: EXP1, the divisor in ARGBH2: ARGBL2: EXP2 in. Export parameters: Results ARGBH1: ARGBL1: EXP1 in. Take up resources: W, STATUS, 020H ~ 02BH, double stack. Note: 1. Load this file also loads the other two files " DUSUB.ASM" , " DUADD.ASM" so users use two sub-programs can be called directly, no need to reload.
Platform: | Size: 1024 | Author: linqiaoli | Hits:

[SCM] PJ1-Floating-Point-Division-ZiyuanCai

Description: Floating Point Division for MIPS with full Comments Use PCSpim to open and run first open float.s second open main.s click "No" for the PCSpim Dialog "Clear program and reinitialize simulator before loading"
Platform: | Size: 6144 | Author: caiziyuan | Hits:

[VHDL-FPGA-Verilog] fpu_div

Description: verilog code floating point division
Platform: | Size: 2048 | Author: Nikhil | Hits:

[SCM] SCM-utility-subroutine6

Description: 本资料详细的介绍了利用单片机实现浮点数除法的一些相关程序-This material detailed introduced the use of SCM realizing floating-point division of some relevant procedure
Platform: | Size: 44032 | Author: lipei | Hits:

[SCM] Floating-point-division-SCM

Description: 浮点除法运算及其在单片机上的实现 论文 -Floating-point division and its implementation on the papers in SCM
Platform: | Size: 429056 | Author: 赵峰 | Hits:

[SCM] Floating-point-division

Description: 单片机浮点数除法的快速编程的方法，新的思路，好文章！-Single-chip floating-point division of the fast programming methods, new ideas, good article!
Platform: | Size: 163840 | Author: reasonhu | Hits:

[Graph program] flodiv

Description: 本程序实现标准浮点数除法。入口参数：被除数在ARGBH1:ARGBL1:EXP1中，除数在ARGBH2:ARGBL2:EXP2中。出口参数：结果在ARGBH1:ARGBL1:EXP1中。-This procedure to achieve the standard floating-point division. Entrance parameters: dividend in ARGBH1: ARGBL1: EXP1, the divisor in ARGBH2: ARGBL2: EXP2 in. Export parameters: the results of ARGBH1: ARGBL1: EXP1 in.
Platform: | Size: 1024 | Author: ledonJu | Hits:

[VHDL-FPGA-Verilog] Verilog_add_div_multi_exp

Description: 使用verilog写的32位浮点数加法模块、浮点数乘法模块、浮点数除法模块、浮点数指数模块。指数模块是综合前面三个例化成泰勒级数求指数，迭代次数（可设置）决定了精度。-Use verilog write 32-bit floating-point addition module, floating-point multiplication module, floating-point division module, the floating point number index module.Index module is a comprehensive index of the front three cases into Taylor series for calculating index, the number of iterations can be set to determine the precision
Platform: | Size: 5120 | Author: 周和 | Hits:

[VHDL-FPGA-Verilog] fu_dian_chu_fa

Description: VHDL浮点除法运算，VHDL浮点数除法，源码，含仿真图 -VHDL floating point division, source code, including simulation mapVHDL floating point division, source code, including simulation map
Platform: | Size: 123904 | Author: 钓江雪 | Hits:

[Other] vhdl-ALU-floating-point-single-precision

Description: Arithmetic and logic unit for floating point single precision addition/substruction, multiplication, division and square root.
Platform: | Size: 10240 | Author: RACHIDI | Hits:
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