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[VHDL-FPGA-Verilog] big_data_encoder

Description: 本文介绍了一个以FPGA为主控制器的多存储芯片数据采集板卡的设计。该卡通过一个符合ATA-6规范的IDE接口,使用PIO模式将数据采集板卡与上位机互联。通过FPGA控制一片高速AD进行数据采集,采集的数据通过4片电子盘并行存储,实现高速大容量数据采集。文章侧重于介绍用FPGA控制电子盘并行读写的方法-This paper introduces an FPGA-based controller design multi memory chip data acquisition board. The card through a line with ATA-6 standard IDE interface, using PIO mode data acquisition board and PC connectivity. FPGA control through a high-speed AD data acquisition, data collected through four parallel electronic disk storage, high-speed large-capacity data acquisition. Article focuses on the introduction of electronic trading methods to read and write in parallel with the FPGA control
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[VHDL-FPGA-Verilog] xst3_IDE

[VHDL-FPGA-Verilog] big_data_encoder

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