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Description: vhdl实现的JPEG嘿嘿 嘿嘿圆圆嘿嘿另-VHDL achieve JPEG laughter laughter another round laughter
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Size: 103977 |
Author: window |
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Description: fpga-jpeg-verilog在fpga平台使用verilog语言进行jpeg算法实现
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Size: 104245 |
Author: yang |
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Description: vhdl实现的JPEG嘿嘿 嘿嘿圆圆嘿嘿另-VHDL achieve JPEG laughter laughter another round laughter
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Size: 103424 |
Author: window |
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Description: bmp图像转换成jpeg图像的一个linux的小程序-bmp image is converted into a jpeg image of the small programs linux
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Size: 24576 |
Author: 王维 |
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Description: 本论文主要论述JPEG2000中嵌入式块编码的FPGA设计,非常有参考价值-this paper mainly discusses JPEG2000 coding embedded blocks of FPGA design, a very valuable reference
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Size: 775168 |
Author: 周辉 |
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Description: 基于fpga的MJPEG编码,用硬件描述语言vlogic写的-they simply based on the JPEG coding, using hardware description language to write the vlogic
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Size: 10240 |
Author: xiao |
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Description: JPEG2000分数位平面编码器的fpga电路实现-scores bitplane JPEG2000 encoder circuit of fpga
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Size: 417792 |
Author: han |
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Description: JPEG静止图像压缩解压缩标准的硬件实现及其改进算法的研究 这是本人做图像压缩时收藏的一个比较经典的硕士论文,希望对大家有参考价值-JPEG still image compression decompression standard hardware and improved algorithm of this is my doing Image Compression collection of a more classic master's thesis, we hope to be a valuable reference
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Size: 2798592 |
Author: QHLee |
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Description: 基于fpga的JPEG编解码器设计,采用流水线优化解决时间并行性问题,提高DCT/IDCT模块的运行速度。-based fpga JPEG codec design, the flow of time to solve optimization problems in parallel, enhance DCT/IDCT module of the operating speed.
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Size: 6895616 |
Author: Janke |
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Description: 华为FPGA设计流程指南,FPGA设计者、项目管理者必读的文档,看看别人是怎么做的。-Huawei FPGA design flow guide, FPGA designers, project managers must-read documents, take a look at how others do.
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Size: 31744 |
Author: 贺雷 |
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Description: 详细介绍JPEG2000的编码原理和建议了FPGA实现结构-Detailed introduction JPEG2000 coding principles and recommendations of the FPGA structure
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Size: 5214208 |
Author: xuyo |
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Description: fpga-jpeg-verilog在fpga平台使用verilog语言进行jpeg算法实现-fpga-jpeg-verilog FPGA platform used in the Verilog language Algorithm jpeg
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Size: 104448 |
Author: yang |
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Description: jpeg格式到bmp格式的硬件实现,verilog开发,fpga 实现。-jpeg format to bmp format hardware realize, verilog development, fpga realize.
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Size: 182272 |
Author: 枫叶鹏 |
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Description: jepg verilog example
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Size: 103424 |
Author: 展望 |
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Description: 嵌入式JPEG Encoder源码,适于PC和FPGA平台,方便移植,该版本为1.20的改进(1.20解压缩后可能无法使用)-JPEG Encoder embedded source, suitable for PC and FPGA platform for transplantation, the improvement of version 1.20 (1.20 after decompression may not be able to use)
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Size: 163840 |
Author: 马振强 |
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Description: 基于FPGA的JPEG图像压缩芯片设计 -FPGA-based JPEG image compression chip design
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Size: 103424 |
Author: 倪德 |
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Description: fpga based jpge 压缩算法,
性能不错,-fpga based jpge compression algorithm, performance good,
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Size: 104448 |
Author: sloanyang |
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Description: 基于FPGA的JPEG图像压缩,实现JPEG图像的实时压缩-FPGA JPEG compress
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Size: 103424 |
Author: 方映 |
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Description: 图形压缩的硬件是想 基于fpga的源代码-Graphics hardware is to compress the source code based on fpga
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Size: 103424 |
Author: 孙旭 |
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Description: fpga实现jpeg压缩,和视频采集程序-fpga jpeg
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Size: 104448 |
Author: guqiutao |
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