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[Com Port] async

Description: 用FPGA实现RS232，代码经过测试通过-FPGA implementation using RS232, the code has been tested through
Platform: | Size: 3072 | Author: treefan.liang | Hits:

[Other] fpga_memory_rev_1_0

Description: Various memories for Xilinx and Altera FPGA devices. Single-port and Dual-port versions with various numbers of read and write ports. Bundle also includes read-first and write-first varieties with sync and async clocks. All memory components are generic, permitting the word width and number of words to be specified easily.
Platform: | Size: 14336 | Author: Muhammed Hasan | Hits:

[VHDL-FPGA-Verilog] async-FIFO

Description: 采用VHDL实现异步的FIFO程序，是学习FPGA的重点内容-VHDL implementation using asynchronous FIFO procedures, the key elements to learn FPGA! !
Platform: | Size: 220160 | Author: yihoumei | Hits:

[VHDL-FPGA-Verilog] async_reset_dff

Description: 异步复位的D触发器 vhdl fpga xilinx spartan-3e-D flip flop async-reset vhdl fpga xilinx spartan-3e
Platform: | Size: 914432 | Author: 朱飞亚 | Hits:

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