Search - fpga based neural network

[Other resource] verilog-som

Description: 拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现-Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone
Platform: | Size: 5857 | Author: 刘索山 | Hits:

[AI-NN-PR] nnsysid20

Description: 基于MATLAB的神经网络非线性系统辨识软件包.-MATLAB-based nonlinear neural network system identification package.
Platform: | Size: 732160 | Author: hylt | Hits:

[VHDL-FPGA-Verilog] verilog-som

Description: 拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现-Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone
Platform: | Size: 5120 | Author: 刘索山 | Hits:

[Other] Automatic_generation_of_neural_networks_for_image_

Description: 提出了利用FPGA的现场可编程以及可并行处理的特性，对基于人工神经网络的图像处理结构进行自动生成的一种技术。作者：Andre B. Soares, Altamiro A. Susin，Leticia V. Guimaraes-Made use of field-programmable FPGA, as well as the characteristics of parallel processing, artificial neural network-based image processing to automatically generate the structure of a technology. Author: Andre B. Soares, Altamiro A. Susin, Leticia V. Guimaraes
Platform: | Size: 1055744 | Author: Rae | Hits:

[Documents] SNN4ImageFeaturIPCAT2007

Description: Based on the information processing functionalities of spiking neurons, a spiking neural network model is proposed to extract features from a visual image. The network is constructed with a conductance-based integrate-and-fire neuron model and a set of specific receptive fields. The properties of the network are detailed in this paper. Simulation results show that the network is able to perform image feature extraction within a time interval of 100 ms. This processing time is consistent with the human visual system. The demonstrations show how the network can extract right-angle contours in a visual image. Based on this principle, many other image features can be extracted by analogy. The parallel processing mechanism of this network model is very promising for a hardware implementation based on VLSI or FPGA technology.
Platform: | Size: 288768 | Author: sacoura31 | Hits:

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[Other resource] verilog-som

[AI-NN-PR] nnsysid20

[VHDL-FPGA-Verilog] verilog-som

[Other] Automatic_generation_of_neural_networks_for_image_

[Documents] SNN4ImageFeaturIPCAT2007

[VHDL-FPGA-Verilog] FPGA_SJ

[VHDL-FPGA-Verilog] verilog-som

[VHDL-FPGA-Verilog] verilog

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