Search - fpga based neural network

Search - fpga based neural network - List

[Other resource] verilog-som DL : 0: 拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现-Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone
Update : 2008-10-13 Size : 5.72kb Publisher : 刘索山
[AI-NN-PR] nnsysid20 DL : 0: 基于MATLAB的神经网络非线性系统辨识软件包.-MATLAB-based nonlinear neural network system identification package.
Update : 2025-02-17 Size : 715kb Publisher : hylt
[VHDL-FPGA-Verilog] verilog-som DL : 0: 拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现-Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone
Update : 2025-02-17 Size : 5kb Publisher : 刘索山
[Other] Automatic_generation_of_neural_networks_for_image_ DL : 0: 提出了利用FPGA的现场可编程以及可并行处理的特性，对基于人工神经网络的图像处理结构进行自动生成的一种技术。作者：Andre B. Soares, Altamiro A. Susin，Leticia V. Guimaraes-Made use of field-programmable FPGA, as well as the characteristics of parallel processing, artificial neural network-based image processing to automatically generate the structure of a technology. Author: Andre B. Soares, Altamiro A. Susin, Leticia V. Guimaraes
Update : 2025-02-17 Size : 1.01mb Publisher : Rae
[Documents] SNN4ImageFeaturIPCAT2007 DL : 0: Based on the information processing functionalities of spiking neurons, a spiking neural network model is proposed to extract features from a visual image. The network is constructed with a conductance-based integrate-and-fire neuron model and a set of specific receptive fields. The properties of the network are detailed in this paper. Simulation results show that the network is able to perform image feature extraction within a time interval of 100 ms. This processing time is consistent with the human visual system. The demonstrations show how the network can extract right-angle contours in a visual image. Based on this principle, many other image features can be extracted by analogy. The parallel processing mechanism of this network model is very promising for a hardware implementation based on VLSI or FPGA technology.
Update : 2025-02-17 Size : 282kb Publisher : sacoura31
[VHDL-FPGA-Verilog] FPGA_SJ DL : 0: 基于FPGA的神经网络硬件实现方法损失是否-Neural network hardware implementation based on FPGA
Update : 2025-02-17 Size : 513kb Publisher : qinxiangfu
[VHDL-FPGA-Verilog] verilog-som DL : 0: 基于fpga的自适应神经网络算法-Fpga-based adaptive neural network algorithm
Update : 2025-02-17 Size : 6kb Publisher : nick
[VHDL-FPGA-Verilog] verilog DL : 0: 自适应神经网络算法，用于障碍物检测，基于FPGA可综合实验-Adaptive neural network algorithm for obstacle detection, based on the FPGA can be integrated experiment
Update : 2025-02-17 Size : 6kb Publisher : zhchwl