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[Other resource] uart.core.for.FPGA

Description: 一个UART的FPGA core，附有详细的代码阅读笔记
Platform: | Size: 614257 | Author: 获得 | Hits:

[VHDL-FPGA-Verilog] MC8051 IP Core

Description: 8051的IP软核，使用硬件描述语言编写，可以下载到FPGA/CPLD中作为片上系统的处理器-8051 IP soft-core, the use of hardware description language can be downloaded to the FPGA/CPLD as a system-on-chip processor
Platform: | Size: 532480 | Author: zy | Hits:

[VHDL-FPGA-Verilog] PS2-IP-CORE-VHDL

Description: 一个PS2 IP CORE(VHDL) for FPGA-A PS2 IP CORE (VHDL) for FPGA
Platform: | Size: 26624 | Author: nanotalk | Hits:

[VHDL-FPGA-Verilog] uart.core.for.FPGA

Description: 一个UART的FPGA core，附有详细的代码阅读笔记-A UART of the FPGA core, accompanied by a detailed code of reading notes
Platform: | Size: 614400 | Author: 获得 | Hits:

[VHDL-FPGA-Verilog] 8086FPGA

Description: xilinx ise 7.1下 实现sparten3 basys板上基于8086FPGA软核的吃豆子游戏-xilinx ise 7.1 under sparten3 basys board based on soft-core 8086FPGA eating beans games
Platform: | Size: 2360320 | Author: 朱万里 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: FPGA设计全流程：Modelsim>>Synplify.Pro>>ISE 第一章 Modelsim编译Xilinx库 第二章 调用Xilinx CORE-Generator 第三章 使用Synplify.Pro综合HDL和内核 第四章 综合后的项目执行 第五章 不同类型结构的仿真-FPGA design of the whole process: Modelsim>> Synplify.Pro>> ISE Chapter ModelSim Xilinx compiler library chapter called Xilinx CORE-Generator Chapter III Synplify.Pro integrated use of Chapter IV of HDL and kernel integrated implementation of the project after the Chapter V structure of different types of simulation
Platform: | Size: 218112 | Author: 青岚之风 | Hits:

[VHDL-FPGA-Verilog] vhdl-core-Kopie_von_mem32_vhd

Description: vhdl 模块对nand flash控制，实现了FPGA对NAND FLASH直接读写控制。-VHDL module nand flash control, the FPGA to realize the direct read and write control NAND FLASH.
Platform: | Size: 4096 | Author: 骑士 | Hits:

[VHDL-FPGA-Verilog] FPGAcode

Description: FPGA核心代码，可在工程中直接使用。-FPGA core code, can be directly used in engineering.
Platform: | Size: 1024 | Author: 猫 | Hits:

[Software Engineering] arm+fpga+ccd

Description: 提出了基于嵌入式技术CCD 采集系统的新方法,并以ARM微处理器和FPGA 芯片为核心设计了嵌入式CCD 采集系统,解决了传统采集方法中系统过于庞大和复杂的问题,具有结构简单、小型化和智能化的特点。试验结果表明,该系统实现了CCD 输出图像的高速采集和实时显示,数据采集速率达到5 MHz。-Embedded technology based on CCD acquisition system A new method, and ARM microprocessors and FPGA chip is designed as the core embedded CCD acquisition system to address the traditional acquisition methods in the system too large and complex problems, is simple in structure, small and intelligent features. Experimental results show that the system realizes high-speed CCD output image acquisition and real-time display, data acquisition rate up to 5 MHz.
Platform: | Size: 333824 | Author: 陈天葆 | Hits:

[VHDL-FPGA-Verilog] fpga-fpdpsk

Description: FSK/PSK调制顶层文件 ，正弦波模块 ，正弦波模块初始化文件 ，振幅调整及波形选择模块 ，频率显示值地址产生模块 ，频率步进键核心模块 ，弹跳消除电路-FSK/PSK modulation top-level documents, sine-wave modules, module initialization file sine wave, amplitude adjustment and waveform selection module, the frequency of the displayed value address generator module, the frequency of stepping key core modules, bouncing the elimination of circuit
Platform: | Size: 27648 | Author: libing | Hits:

[SCM] 8051-core

Description: mcu8051 CPU FPGA VHDL software
Platform: | Size: 52224 | Author: 房有定 | Hits:

[Linux-Unix] Xinlinx_Spartan3E500_RevD_10.1

Description: 这个是我使用xilinx EDK 10.1建立的用语移植petalogic的uclinux发行版本petalinux-v0.4-rc2的Platform工程，开发板使用的是Spartan3E Starter Kit。在这个基础上可以直接裁剪内核后在FPGA中运行uclinux。内核源码可以到developer.petalogix.com下载。-This is a xilinx EDK 10.1, I use the term established by the uclinux transplantation petalogic release petalinux-v0.4-rc2 the Platform project, the development board using Spartan3E Starter Kit. On this basis can be directly cut in the FPGA core to run uclinux. Kernel source code can be downloaded developer.petalogix.com.
Platform: | Size: 13669376 | Author: 古月 | Hits:

[Software Engineering] FPGA_ep1c3-144-core

Description: 用PROTEL软件设计的FPGA最小系统板。FPGA的型号为EP1C3-144，需要制作最小系统板的可以参考一下。-PROTEL software design of the FPGA with the minimum system board. FPGA-model EP1C3-144, need to make the minimum system board that can be reference.
Platform: | Size: 162816 | Author: shuaige | Hits:

[SCM] 20090903FPGA

Description: 传统的波形发生器采用模拟技术的方法，这种方法构成的波形发生器电路结构复杂，仅能产生正弦波、方波、锯齿波和三角波等几种简单波形。而现在在高科技领域，我们需要的可能是一些任意波形，如在保密雷达发波等军事方面和地震波形、汽车碰撞波形等模拟仿真应用方面。任意波形发生器现在被广泛用于自动控制系统、振动激励、仪器仪表领域。我国目前在这方面还比较落后，特别是在用DDS技术实现任意波形发生器方面。本课题我们打算用DDS技术基于FPGA核心板设计一个任意波形发生器。该仪器我们用LabVIEW来写的控制面板实现与FPGA的通信，实现任意波形数据的采集，并具有良好的人机交互界面。用液晶显示屏显示波形的幅度和频率。用4×4键盘控制相关波形的输出。用AD和低通滤波电路实现数电到模电的转换-The traditional waveform generator adopts the method of simulation technology, this kind of method constitute the waveform generator circuit structure is complex, can only produce sine and square-wave, sawtooth wave and triangular several simple waveform. And now in the high-tech fields, we may need some arbitrary waveform is, as in LeiDaFa confidential military aspects and seismic waves, automobile collisions wave wave simulation application. Arbitrary waveform generator is now widely used in automatic control system, vibration, instruments field. At present in this respect, especially in still lag behind with arbitrary waveform generator DDS technology. This task we intend to use DDS technology based on FPGA core board design an arbitrary waveform generator. The instrument to write with LabVIEW, we realize the control panel and FPGA communication, realizing arbitrary waveform data acquisition, and has good human-machine interface. With LCD display wave amplitude and frequency. Use 4
Platform: | Size: 532480 | Author: zhangying | Hits:

[VHDL-FPGA-Verilog] FPGA-LCD

Description: VHDL文章：以FPGA为核心的液晶显示电路设计与实现-VHDL article: The FPGA as the core liquid crystal display circuit design and implementation of
Platform: | Size: 244736 | Author: 王恒毅 | Hits:

[File Format] Advanced-Xilinx-FPGA

Description: Advanced Xilinx FPGA Design with ISE Objectives Describe Virtex™ -II advanced architectural features and how they can be used to improve performance • Create and integrate cores into your design flow using the CORE Generator™ System • Describe the different ISE options available and how they can be used to improve performance • Describe a flow for obtaining timing closure with Advance Timing Constraints • Use FloorPlanner to improve timing • Reduce implementation time with Incremental Design Techniques and Modular Design Techniques • Reduce debugging time with FPGA Editor • On-Chip Verification with ChipScope Pro-Advanced Xilinx FPGA Design with ISE Objectives Describe Virtex™ -II advanced architectural features and how they can be used to improve performance • Create and integrate cores into your design flow using the CORE Generator™ System • Describe the different ISE options available and how they can be used to improve performance • Describe a flow for obtaining timing closure with Advance Timing Constraints • Use FloorPlanner to improve timing • Reduce implementation time with Incremental Design Techniques and Modular Design Techniques • Reduce debugging time with FPGA Editor • On-Chip Verification with ChipScope Pro
Platform: | Size: 10615808 | Author: rakesh | Hits:

[Software Engineering] FPGA

Description: 基于FPGA的步进电机细分控制器的设计。以EDA技术为核心、在可编程逻辑器件上进行系统芯片集成的新设计方法-Segment FPGA-based stepper motor controller design. With EDA technology as the core, in the programmable logic device on the system-chip integration of new design method
Platform: | Size: 275456 | Author: 金 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 基于FPGA哥专用芯片双核心处理，MB86S02 CMOS 视频采集实现嵌入式视频采集与处理的设计过程-FPGA-based ASIC dual-core processing Colombia, MB86S02 CMOS video capture video capture and processing of embedded design process
Platform: | Size: 5120 | Author: 周志法 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: FPGA应用开发入门与典型实例 代码 FPGA（现场可编程逻辑器件）以其体积小、功耗低、稳定性高等优点被广泛应用于各类电子产品的设计中。本书全面讲解了FPGA系统设计的背景知识、硬件电路设计，硬件描述语言Verilog HDL的基本语法和常用语句，FPGA的开发工具软件的使用，基于FPGA的软核嵌入式系统，FPGA设计的基本原则、技巧、IP核， FPGA在接口设计领域的典型应用，FPGA＋DSP的系统设计与调试，以及数字变焦系统和PCI数据采集系统这两个完整的系统设计案例。 -FPGA Application Development and Typical examples of code for FPGA (field programmable logic device) for its small size, low power consumption, high stability, the advantages are widely used in the design of electronic products. This book comprehensively explained the background FPGA system design, hardware design, hardware description language Verilog HDL syntax and basic common statement, FPGA use of the software development tools, FPGA-based soft-core embedded systems, FPGA design of the basic principles , skills, IP core, FPGA interface design field in a typical application, FPGA+ DSP system design and debug, and digital zoom systems and PCI data acquisition system design of two cases of complete system.
Platform: | Size: 10980352 | Author: 海到无涯 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 结合FPGA和以太网传输的特点，设计了一套数据采集系统，应用FPGA的内部逻辑实现对ADC、SDRAM、网卡控制芯片DM9000的时序控制，以FPGA作为采集系统的核心，通过ADC，将采集到的数据存储到SDRAM中，以FIFO方式从SDRAM中读出数据，并将数据结果通过以太网接口传输到计算机-Combination of FPGA and Ethernet features, designed a data acquisition system, application FPGA' s internal logic to realize the ADC, SDRAM, LAN controller chip DM9000 timing control to capture FPGA as the core of the system, through the ADC, will be collected The data stored in SDRAM, the SDRAM in order to read data from the FIFO method, and data results to a computer via Ethernet interface
Platform: | Size: 388096 | Author: gdr | Hits:
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