Search - fpga ram dsp

[Other resource] my_fifo_vhdl

Description: XILINX的FPGA实现的双口ram源码，可作为dsp\\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \\ SDRAM and pci bridge, and can be used directly, through practical projects.
Platform: | Size: 19762 | Author: 朱效志 | Hits:

[VHDL-FPGA-Verilog] my_fifo_vhdl

Description: XILINX的FPGA实现的双口ram源码，可作为dsp\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
Platform: | Size: 19456 | Author: 朱效志 | Hits:

[VHDL-FPGA-Verilog] ug_ram

Description: RAM design for FPGA in verilog
Platform: | Size: 289792 | Author: NguyenViet | Hits:

[VHDL-FPGA-Verilog] m_decoder

Description: 恢复以曼彻斯特编码格式输入的mdi信号成实际数据并存储在双端口RAM后以中断方式通知DSP读取数据，所需双端口RAM程序可以从相应的FPGA编译系统中产生-A return to the Manchester encoded signal is input into the actual data mdi and stored in the dual-port RAM notify the DSP after the break to read the data, the required dual-port RAM from the corresponding FPGA program can be generated build system
Platform: | Size: 2048 | Author: 周宽裕 | Hits:

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[Other resource] my_fifo_vhdl

[VHDL-FPGA-Verilog] my_fifo_vhdl

[VHDL-FPGA-Verilog] ug_ram

[VHDL-FPGA-Verilog] m_decoder

[VHDL-FPGA-Verilog] emifa_ram

[source in ebook] Dual-RAM

[VHDL-FPGA-Verilog] fpga

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