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[Embeded-SCM Develop] 基于FPGA的RS232实现 DL : 1: 基于FPGA的RS232实现
Update : 2011-06-02 Size : 1.87kb Publisher : hughzotob@gmail.com
[VHDL-FPGA-Verilog] serial_ppga DL : 0: 异步串口通信口在FPGA实现，功能有（1）串行数据接收的同步控制；（2）串行数据发送的同步控制-asynchronous serial communication port of the FPGA, function (1) serial data receiver synchronization control; (2) the transmission of serial data synchronization control
Update : 2025-02-17 Size : 195kb Publisher : 孙洪亮
[VHDL-FPGA-Verilog] vhdl_rs232 DL : 0: 使用FPGA透过RS232与PC的作沟通，
Update : 2025-02-17 Size : 3kb Publisher : 苏山河
[Com Port] RS232 DL : 0: FPGA实现RS-232串口收发的Verilog程序，已经调通。-FPGA realization of RS-232 serial port to send and receive the Verilog procedures, Qualcomm has been transferred.
Update : 2025-02-17 Size : 2kb Publisher :
[VHDL-FPGA-Verilog] rs232 DL : 0: RS232 verilog design
Update : 2025-02-17 Size : 112kb Publisher : liuKe
[VHDL-FPGA-Verilog] cyclic DL : 0: FPGA的串口通信程序，可接受或者发送数据，通过Rs232口-FPGA serial communication program, acceptable, or send data through the RS232 port
Update : 2025-02-17 Size : 1.25mb Publisher : xianchunwwang
[VHDL-FPGA-Verilog] FPGArealizeRS232 DL : 0: 用FPGA实现RS232通信,此代码是用VHDL语言编写，非常有用的好东东啊-RS232 Communication with FPGA realize that this code is written in VHDL, very useful, good东东啊
Update : 2025-02-17 Size : 47kb Publisher : 孙建军
[Books] ComunicationRealizationBetweenFPGAandSerialInterfa DL : 0: 杜晓斌和陈兴文-FPGA和单片机串行通信接口的实现一文提出了FPGA与单片机实现数据串行通信的解决方案。在通信过程中完全遵守RS232 协议，给出了发送模块的vhdl源代码。 -杜晓斌and陈兴文-FPGA single-chip serial communication interface and the realization of a text proposed by the FPGA and MCU serial data communications solutions. In the communication process in full compliance with the RS232 protocol is given to send the VHDL source code modules.
Update : 2025-02-17 Size : 90kb Publisher : Wuxinmin
[VHDL-FPGA-Verilog] RS232 DL : 0: RS232串口通信协议，verilog实现，通过FPGA完全调通。-RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
Update : 2025-02-17 Size : 3kb Publisher : dingsheng
[VHDL-FPGA-Verilog] RS232_pro DL : 0: RS232 verilog coding 全参数化设计可以自己设定波特率时钟频率等完全FPGA实现调通-RS232 verilog coding the entire parametric design can set the baud rate clock frequency of FPGA to achieve complete transfer pass
Update : 2025-02-17 Size : 2kb Publisher : dinsh
[Com Port] async DL : 0: 用FPGA实现RS232，代码经过测试通过-FPGA implementation using RS232, the code has been tested through
Update : 2025-02-17 Size : 3kb Publisher : treefan.liang
[Com Port] FPGArs232 DL : 0: FPGA中实现rs232串口通信程序，上位机和FPGA互发数据-FPGA to achieve rs232 serial communication procedures, each host computer and FPGA-fat data
Update : 2025-02-17 Size : 98kb Publisher : wg
[VHDL-FPGA-Verilog] rs232 DL : 0: fpga的串口读写程序，经硬件测试成功，波特率9600.可以改变分频值适应不同的时钟和波特率-fpga serial read and write procedures, by the hardware to test the success of 9600 baud rate. frequency value can be changed to adapt to a different clock and baud rate
Update : 2025-02-17 Size : 375kb Publisher : cjy
[VHDL-FPGA-Verilog] RS232 DL : 0: 基于Xilinx Spartan3E的RS232驱动，能够实现FPGA与PC得通信-Xilinx Spartan3E based on the RS232 driver, to achieve a FPGA and PC communication
Update : 2025-02-17 Size : 500kb Publisher : darkblue
[VHDL-FPGA-Verilog] rs232 DL : 1: 完整的RS232 Verilog源代码，支持波特率可调，支持调试命令，配合串口调试工具，可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
Update : 2025-02-17 Size : 13kb Publisher : 弘历
[VHDL-FPGA-Verilog] RS232 DL : 0: RS232 串口通信的 VHDL描述，初学FPGA的朋友可以-RS232 serial communication VHDL description, FPGA beginner friends can see
Update : 2025-02-17 Size : 1.28mb Publisher : chengwenfan
[Com Port] FPGA-RS232-verilog DL : 0: fpga上的串口驱动程序，包括接收主机来的数据（deserial）和发送由FPGA产生的数据(serial).该程序的调试需要借助串口调试助手-serial port driver on the fpga, including the receiving host to the data (deserial) and send the data generated by the FPGA (serial) to pc. The program needs the serial debug debugging assistant
Update : 2025-02-17 Size : 489kb Publisher : yvaine
[VHDL-FPGA-Verilog] FPGA-UART DL : 0: 该资料是实现VHDL的串口通信(UART)，RS232接口协议，-VHDL implementation of serial communication
Update : 2025-02-17 Size : 1.99mb Publisher : lp
[Other] FPGA-rs232(verilog)-2 DL : 0: FPGA rs232串口收发程序，3个程序任意选择，全部可用-FPGA rs232 serial transceiver procedures, three procedures arbitrarily selected, all available
Update : 2025-02-17 Size : 98kb Publisher : xy
[VHDL-FPGA-Verilog] UART DL : 0: Verilog写的UART 协议。可用于FPGA RS232接口实现。(The UART protocol written by Verilog. It can be used for the implementation of the FPGA RS232 interface.)
Update : 2025-02-17 Size : 1kb Publisher : Gavin_Wang

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