Description: 能综合的YCrCb2RGB模块(verilog)_采用3级流水线,用fpga做小数运算,还有就是流水线技术 -can YCrCb2RGB integrated module (Verilog) _ used three lines, they simply do with fractional arithmetic, there is pipelining technology Platform: |
Size: 1024 |
Author:于飞 |
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Description: 一个verilog实现的crc校验,用于fpga实现,快速,准确有效-A Verilog realize the CRC checksum for the FPGA realization, rapid, accurate and effective Platform: |
Size: 1440768 |
Author:枫叶鹏 |
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Description: FPGA大量实例,仅供参考,适合新手学习-FPGA a large number of examples for reference only, suitable for novices to learn Platform: |
Size: 2601984 |
Author:Sem |
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Description: CRC计算模块,7位CRC计算。经过FPGA及IC平台验证。-CRC calculation module, 7 CRC calculation. Through the FPGA and IC platform for verification. Platform: |
Size: 1024 |
Author:liu |
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Description: verilog HDL语言编写的HDLC协议的IP核,包括通讯控制及CRC。-written in verilog HDL HDLC protocol IP core, including communications control and CRC. Platform: |
Size: 69632 |
Author:王强 |
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