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Description: 利用FPGA实现浮点运算的verilog代码
希望能够给需要做这方面研究的同仁有所帮助-use FPGA floating-point operations verilog code hope to be able to do this to the need for research in the Tongren help
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Size: 130142 |
Author: jake |
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Description: 利用FPGA实现浮点运算的verilog代码
希望能够给需要做这方面研究的同仁有所帮助-use FPGA floating-point operations verilog code hope to be able to do this to the need for research in the Tongren help
Platform: |
Size: 130048 |
Author: jake |
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Description: 这是一个32位的浮点运算单元(FPU),它可以根据IEEE754标准被完全编译。此FPU已被硬件测试和被软件仿真通过。-This is a 32-bit floating point unit (FPU),It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Standard. The FPU was tested and simulated in hardware and software.
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Size: 1981440 |
Author: 赵恒 |
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Description: Verilog HDL code for implementation of double floating point architecture. Program takes care of diffent exceptions like overflow, underflow, NaN etc
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Size: 696320 |
Author: Ruchi |
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