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[Other resource] fpu

Description: 使用VHDL语言描述的单精度浮点处理器。源代码来自国外网站。可实现单精度浮点数的加减乘运算。
Platform: | Size: 16530 | Author: WeimuMa | Hits:

[Other] SimplyFPU1-1

Description: FPU write with VHDL in modelsim
Platform: | Size: 265216 | Author: bahador | Hits:

[VHDL-FPGA-Verilog] fpu

Description: 利用FPGA实现浮点运算的verilog代码 希望能够给需要做这方面研究的同仁有所帮助-use FPGA floating-point operations verilog code hope to be able to do this to the need for research in the Tongren help
Platform: | Size: 130048 | Author: jake | Hits:

[VHDL-FPGA-Verilog] fpu

Description: 使用VHDL语言描述的单精度浮点处理器。源代码来自国外网站。可实现单精度浮点数的加减乘运算。-Described in VHDL language using single-precision floating-point processor. Web site source code from abroad. Can be achieved single precision floating point addition and subtraction, multiplication.
Platform: | Size: 16384 | Author: WeimuMa | Hits:

[Other] fpu.tar

Description:
Platform: | Size: 73728 | Author: 26 | Hits:

[VHDL-FPGA-Verilog] leon-2.2.tar

Description:
Platform: | Size: 379904 | Author: Jackson | Hits:

[Other] f

Description: This documents describes a free single precision floating point unit. This floating point unit can perform add, subtract, multiply, divide, integer to floating point and floating point to integer conversion.-This documents describes a free single precision floating point unit. This floating point unit can perform add, subtract, multiply, divide, integer to floating point and floating point to integer conversion.
Platform: | Size: 73728 | Author: k | Hits:

[VHDL-FPGA-Verilog] fpu100_latest.tar

Description: 这是一个32位的浮点运算单元（FPU），它可以根据IEEE754标准被完全编译。此FPU已被硬件测试和被软件仿真通过。-This is a 32-bit floating point unit (FPU),It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Standard. The FPU was tested and simulated in hardware and software.
Platform: | Size: 1981440 | Author: 赵恒 | Hits:

[Other] fpu

Description: fpu_d,VHDL编写的fpu双精度运算器，可以使用。-fpu_d
Platform: | Size: 121856 | Author: 余 | Hits:

[VHDL-FPGA-Verilog] fpu100_latest.tar

Description: This a 32-bit floating point unit (FPU), which I developed in a project within the Vienna University of Technology. It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Standard-This is a 32-bit floating point unit (FPU), which I developed in a project within the Vienna University of Technology. It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Standard
Platform: | Size: 1970176 | Author: amin | Hits:

[VHDL-FPGA-Verilog] PIDctrol

Description: VHDL实现PI控制,包括三个文件,FPU,PID-VHDL pi control，pid
Platform: | Size: 2048 | Author: 杨军 | Hits:

[VHDL-FPGA-Verilog] FPU

Description: Verilog HDL code for implementation of double floating point architecture. Program takes care of diffent exceptions like overflow, underflow, NaN etc
Platform: | Size: 696320 | Author: Ruchi | Hits:

[VHDL-FPGA-Verilog] fpu_v2_10_example_designs

Description: fpu example designs with VHDL
Platform: | Size: 343040 | Author: ricvadim | Hits:

[Other] grlib-netlists-1.1.0.tar

Description: leon for 3 fpu. The LEON3 is a synthesisable VHDL model of a 32-bit processor compliant with the SPARC V8 architecture. The model is highly configurable, and particularly suitable for system-on-a-chip (SOC) designs.
Platform: | Size: 19076096 | Author: serg | Hits:

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