Search - gray counter

[VHDL-FPGA-Verilog] GrayCounter

Description:
Platform: | Size: 1024 | Author: 于玮 | Hits:

[VHDL-FPGA-Verilog] geleicounter

Description: 开发环境是FPGA开发工具，格雷码计数器的VHDL程序-Development environment is the FPGA development tools, Gray code counter VHDL procedures
Platform: | Size: 1024 | Author: horse | Hits:

[VHDL-FPGA-Verilog] bhgfdti

Description: 含有七人表决器，格雷码变换电路，英文字符显示电路，基本触发器（D和JK），74LS160计数器功能模块，步长可变的加减计数器-Containing seven people vote, and Gray code conversion circuit, the English characters display circuit, the basic flip-flop (D and JK), 74LS160 counter function modules, variable-step addition and subtraction counter
Platform: | Size: 423936 | Author: 俞皓尹 | Hits:

[VHDL-FPGA-Verilog] graycnt_3

Description: 3位格雷码计数器的verilog描述及仿真波形-3 Gray code counter verilog description and simulation waveforms
Platform: | Size: 2048 | Author: 李慧静 | Hits:

[VHDL-FPGA-Verilog] graycnt_14

Description: 14位格雷码计数器的verilog描述及仿真波形-14-bit Gray code counter verilog description and simulation waveforms
Platform: | Size: 2048 | Author: 李慧静 | Hits:

[Documents] Graycodeconvertor

Description: It is a code for Gray code counter.It can convert normal binary numbers into gray codes
Platform: | Size: 696320 | Author: hns | Hits:

[VHDL-FPGA-Verilog] GrayCnt

Description: 格雷码计数器 VerilogHDL语言编写-Gray-code counter using VerilogHDL language
Platform: | Size: 8192 | Author: zy | Hits:

[VHDL-FPGA-Verilog] GrayCounter2

Description: gray counter for async FIFO design
Platform: | Size: 1024 | Author: zismad | Hits:

[VHDL-FPGA-Verilog] vhdlcoder

Description: 本文件夹包含了16个VHDL 编程实例，仅供读者编程时学习参考。一、四位可预置75MHz -BCD码（加/减）计数显示器（ADD-SUB）。二、指示灯循环显示器（LED-CIRCLE) 三、七人表决器vote7 四、格雷码变换器graytobin 五、1位BCD码加法器bcdadder 六、四位全加器adder4 七、英语字母显示电路 alpher 八、74LS160计数器74ls160 九、可变步长加减计数器 multicount 十、可控脉冲发生器pluse 十一、正负脉宽数控调制信号发生器pluse width 十二、序列检测器string 十三、出租车计费器spend 十四、数字秒表selclk 十五、抢答器 first -This folder contains 16 examples of VHDL programming, only for readers to learn programming reference. 1, 4 Preset 75MHz-BCD code (plus/minus) count display (ADD-SUB). Second, light cycle display (LED-CIRCLE) 3, seven voting machines vote7 4, Gray code converter graytobin 5, a BCD code adder bcdadder six, four full adder adder4 seven or eight English letter display circuit alpher , 74LS160 counter 74ls160 9, variable-step addition and subtraction counters multicount 10, controllable pulse generator pluse 11, positive and negative pulse width modulation signal generator pluse width of NC 12, sequence detector string 13, a taxi billing spend 14 devices, digital stopwatch selclk 15, Responder first
Platform: | Size: 59392 | Author: 李磊 | Hits:

[VHDL-FPGA-Verilog] GrayCnt

Description: 格雷码计数器的verilog实现，做通讯的朋友可以-Gray code counter verilog implementation, so friends can see communication
Platform: | Size: 1024 | Author: 磊 | Hits:

[VHDL-FPGA-Verilog] PLD

Description: PLD实验代码，包括格雷码计数器、键盘扫描和LED点阵显示、SRAM读写、LCD12864显示汉字。-PLD experimental code, including the Gray code counter, keyboard scanning and LED dot matrix display, SRAM read and write, LCD12864 display Chinese characters.
Platform: | Size: 132096 | Author: 马昭鑫 | Hits:

[VHDL-FPGA-Verilog] 2

Description: 格雷码转换计数器的实现两个程序的实现-Gray code conversion Implementation of counter
Platform: | Size: 1024 | Author: guoliang | Hits:

[VHDL-FPGA-Verilog] gray

Description: 基于Verilog的GRAY计数器。以及测试文件，在simulation的文件件中的top文件。-Based on Verilog, GRAY counter. And test files, the files in the simulation of the top pieces of the file.
Platform: | Size: 2417664 | Author: 栾帅 | Hits:

[Embeded-SCM Develop] STM32_graycntr

Description: Gray counter example for STM32 and CodeSourcery G-Gray counter example for STM32 and CodeSourcery GCC
Platform: | Size: 67584 | Author: Vaclavpe | Hits:

[VHDL-FPGA-Verilog] Gray-Counter

Description: 格雷码，用于理解格雷码的的功能，减少出错。同样对于卡诺图很用吧。-Gray code, Gray code, the function used to understand and reduce errors. The same for the Karnaugh map.
Platform: | Size: 1024 | Author: 郭稳 | Hits:

[Software Engineering] counter

Description: vhdl语言做的4位可逆计数器和格雷码转换器，包括具体代码和仿真结果-vhdl language do four reversible counter and Gray code converter, including a specific code and simulation results
Platform: | Size: 115712 | Author: 张瑞萌 | Hits:

[Other] fifo-code

Description: Verilog代码：同步\异步FIFO。包含格雷码计数器.-Verilog code: syncronous\asyncourous FIFO. containing gray counter.
Platform: | Size: 3072 | Author: 王文 | Hits:

[VHDL-FPGA-Verilog] FIFO-and-CAM

Description: verilog code for gray counter,synchronous and asynchronous fifo
Platform: | Size: 25600 | Author: Abhijeet | Hits:

[VHDL-FPGA-Verilog] verilog-8-bit-Gray-Counter

Description: Verilog 8 bit Gray Counter
Platform: | Size: 10240 | Author: cmags | Hits:

[Other] gray_counter

Description: 格雷码计数器实质包含了三个部分格雷码转二进制、加法器、二进制转格雷码。通过quartus II 自带的Modlesim仿真验证了能够实现二进制和格雷码之间的转换(Gray counter essence contains three parts, gray code to binary adder, binary gray code conversion. Modlesim simulation by quartus with II verified to achieve the conversion between binary and gray code)
Platform: | Size: 2977792 | Author: hay_123 | Hits:

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[VHDL-FPGA-Verilog] GrayCounter

[VHDL-FPGA-Verilog] geleicounter

[VHDL-FPGA-Verilog] bhgfdti

[VHDL-FPGA-Verilog] graycnt_3

[VHDL-FPGA-Verilog] graycnt_14

[Documents] Graycodeconvertor

[VHDL-FPGA-Verilog] GrayCnt

[VHDL-FPGA-Verilog] GrayCounter2

[VHDL-FPGA-Verilog] vhdlcoder

[VHDL-FPGA-Verilog] GrayCnt

[VHDL-FPGA-Verilog] PLD

[VHDL-FPGA-Verilog] 2

[VHDL-FPGA-Verilog] gray

[Embeded-SCM Develop] STM32_graycntr

[VHDL-FPGA-Verilog] Gray-Counter

[Software Engineering] counter

[Other] fifo-code

[VHDL-FPGA-Verilog] FIFO-and-CAM

[VHDL-FPGA-Verilog] verilog-8-bit-Gray-Counter

[Other] gray_counter

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