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[
VHDL-FPGA-Verilog
]
hdb3_verilog
Description:
modelsim工程，用verilog实现的HDB3编码，以及测试程序testbench-modelsim works with verilog realized HDB3 coding, and testing procedures testbench
Platform:
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Size:
22528
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Author:
chengroc
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