Search - ieee verilog

Search - ieee verilog - List

[Other resource] IEEE Std 1364.1-2002 IEEE Std. 1364.1 - 2002 IEEE DL : 0: IEEE Std 1364.1-2002 IEEE Std. 1364.1 - 2002 IEEE Standard for Verilog Register Transfer Level Synthesis.rar
Update : 2008-10-13 Size : 371.9kb Publisher : 王刚
[Other resource] verilog-ieee DL : 0: verilog ieee standard 2001
Update : 2008-10-13 Size : 2.07mb Publisher : liang
[Books] verilog 黄金手册 DL : 0: verilog HDL IEEE标准手册。很不错，可以做手册参考。
Update : 2009-06-01 Size : 272.37kb Publisher : raini135792
[Other Embeded program] IEEE Std 1364.1-2002 IEEE Std. 1364.1 - 2002 IEEE DL : 0: IEEE Std 1364.1-2002 IEEE Std. 1364.1 - 2002 IEEE Standard for Verilog Register Transfer Level Synthesis.rar-IEEE Std 1364.1-2002 IEEE Std. 1364.1- 2002 IEEE Standard for Verilog Register Transfer Level Synthesis.rar
Update : 2025-02-17 Size : 372kb Publisher : 王刚
[source in ebook] SystemC片上系统设计源代码 DL : 0: SystemC片上系统设计的源代码：书籍介绍： SystemC是被实践证明的优秀的系统设计描述语言，它能够完成从系统到门级、从软件到硬件、从设计到验证的全部描述。SystemC 2.01已作为一个稳定的版本提交到IEEE，申请国际标准。本书为配合清华大学电子工程系SystemC相关课程的教学而编写。全书分9章，内容包括：硬件描述语言的发展史；SystemC出现的历史背景和片上系统设计方法学概述；SystemC的基本语法；SystemC的寄存器传输级设计和SystemC的可综合语言子集，以及根据作者设计经历归结的RTL设计准则和经验；接口、端口和通道等SystemC行为建模实例——片上总线系统；SystemC与VHDL/Verilog HDL的比较；SystemC的验证标准和验证方法学；SystemC开发工具SystemC_win、WaveViewer等，以及使用MATLAB进行SystemC算法模块的验证。每一章都精心编写了课后习题以配合教学的需要。本书可作为大学电子设计自动化（EDA）相关课程教材，也可供电子工程技术人员作为SystemC设计、应用开发的技术参考书。本书丰富的实例源代码特别适合初学者根据内容实际运行、体会，举一反三，以掌握SystemC进行应用系统设计。 -SystemC system on chip design source : books introduced : SystemC has been proven in practice is an excellent system design description language, it can be completed from the system level to the door, from hardware to software, from design to verification of all description. SystemC has 2.01 as a stable version submitted to the IEEE, the application of international standards. The book to tie in electronic engineering at Tsinghua University SystemC related courses and preparation of teaching. Book nine chapters, including : hardware description language development history; SystemC is the historical background and system-on-chip design methodology outlined; SystemC basic grammar; SystemC register-transfer-level design and synthesis of SystemC language subset, as well as design experience b
Update : 2025-02-17 Size : 2.52mb Publisher : c.li
[Compress-Decompress algrithms] jpeg_encoder DL : 0: 完整的jpeg encoder verilog code,DCT部分採用1991 IEEE transection paper,利用skew circular convolution來實現精簡電路-complete jpeg encoder Verilog code, DCT is partly based on the IEEE 1991 transection paper, using skew circular convolutions to achieve streamlining circuit
Update : 2025-02-17 Size : 25kb Publisher : 李寧
[VHDL-FPGA-Verilog] DCT_1D DL : 0: 一维DCT变换的verilog源码，可用于JPEG算法优化的参考。程序中用到的算法称为“扭卷积”，可参考相关IEEE paper-One-dimensional DCT transform Verilog source code can be used to optimize the JPEG algorithm reference. Procedures used in the algorithm known as the
Update : 2025-02-17 Size : 53kb Publisher : 楚天
[Other] verilog-ieee DL : 0: verilog ieee standard 2001
Update : 2025-02-17 Size : 2.07mb Publisher : liang
[Internet-Network] IEEE_standard_Verilog_HDL1364_2001 DL : 0: IEEE standard Verilog HDL1364-2001.pdf Verilog 学习必备资料-IEEE standard Verilog HDL1364-2001.pdfVerilog learning essential information
Update : 2025-02-17 Size : 2.07mb Publisher : 洪磊
[VHDL-FPGA-Verilog] Verilog DL : 1: 很不错的Verilog 书籍，包括ieee标准和黄金指南-Very good Verilog books, including ieee standards and Gold Guide
Update : 2025-02-17 Size : 3.24mb Publisher : haiwaw
[Other] Kluwer.The.Verilog.Hardware.Description.Language.5 DL : 1: Verilog硬件描述语言，第五版 Thomas&Moorby等著。权威的Verilog介绍，包含IEEE-1364 2001 标准 -The Verilog® Hardware Description Language, Fifth Edition. By Thomas&Moorby
Update : 2025-02-17 Size : 6.86mb Publisher : Jasper Hu
[Software Engineering] IEEE_Verilog_2001 DL : 0: Verilog 2001 编程规范中文版，作为ASIC和FPGA逻辑开发人员学习不可多得的资料，也可以作为逻辑开发高手们学习查阅的工具。新手们可以按照实例自己编程操练。
Update : 2025-02-17 Size : 2.13mb Publisher : 徐杰猛
[Other] Verilog_HDL DL : 0: Written for both experienced and new users, this book gives you broad coverage of Verilog HDL. The book stresses the practical design and verification perspective ofVerilog rather than emphasizing only the language aspects. The informationpresented is fully compliant with the IEEE 1364-2001 Verilog HDL standard.
Update : 2025-02-17 Size : 1.64mb Publisher : lucer_29a
[Other] verilog-ieee2001 DL : 0: verilog IEEE标准，学verilog必须要看的资料，将近800页，非常推荐-verilog IEEE standards, learning verilog have to look at the data, nearly 800 pages, very recommended
Update : 2025-02-17 Size : 2.07mb Publisher : huizi
[Other] design_through_verilog_IEEE DL : 0: Book name: Verilog author:ieee edition: 2e Very good book
Update : 2025-02-17 Size : 1.76mb Publisher : honey
[VHDL-FPGA-Verilog] IEEE.Standard.Verilog.Hardware.Description.Languag DL : 0: IEEE Standard Verilog Hardware Description Language-IEEE Standard Verilog Hardware Description Language(
Update : 2025-02-17 Size : 2.08mb Publisher : liukai
[File Format] verilog-ieee.pdf.tar DL : 0: IEEE 2001 verilog 标准 ,详细讲述了业内公认的 VERILOG 标准 ,-The Verilog¤ Hardware Description Language (Verilog HDL) became an IEEE standard in 1995 as IEEE Std 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstraction in a standard textual format for a variety of design tools, including verification simulation, timing analysis, test analysis, and synthesis. It is because of these rich features that Verilog has been accepted to be the language of choice by an overwhelming number of IC designers.
Update : 2025-02-17 Size : 2.1mb Publisher : adam
[VHDL-FPGA-Verilog] IEEE_Verilog_2001 DL : 0: 原版IEEE verilog/VHDL 2001标准。-IEEE verilog/VHDL 2001
Update : 2025-02-17 Size : 2.08mb Publisher : zmm
[VHDL-FPGA-Verilog] IEEE Standard for Verilog 2005 DL : 0: IEEE Standard for Verilog 2005
Update : 2025-02-17 Size : 2.99mb Publisher : zking
[VHDL-FPGA-Verilog] IEEE Standard for Verilog 2005 DL : 0: this book introduces the use of Verilog HDL.
Update : 2025-02-17 Size : 2.99mb Publisher : ^U^

« 12 3 4 »