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[Com Port] iic

Description: iic 总线 verilog 源代码 标准i2c总线， 有sda scl 时钟，频率自定-IIC bus standard Verilog source code i2c bus, has sda scl clock, the frequency of self-
Platform: | Size: 2048 | Author: johnnyz | Hits:

[VHDL-FPGA-Verilog] EEPROM

Description: VHDL语言写的IIC实现EEPROM，很好的程序，已经用过，没有问题-Written in VHDL language IIC achieve EEPROM, good procedures are used, there is no problem
Platform: | Size: 1049600 | Author: 云川 | Hits:

[Program doc] iic_master

Description: it is a iic source verilog code with its testcase which can act only as master
Platform: | Size: 3072 | Author: nifrad | Hits:

[VHDL-FPGA-Verilog] iic_verilog

Description: iic 程序 用verilog语言编写，可以直接使用-iic program using verilog language, can be used directly
Platform: | Size: 90112 | Author: weizuox | Hits:

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