Description: 显卡中关于3D图形处理的源码，是VHDL版本的
喜欢硬件FPGA图像处理的可以看看，挺有意思-Graphics 3D graphics on the source, is like VHDL version of the FPGA hardware image processing can see quite interesting Platform: |
Size: 1686528 |
Author:dido wang |
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Description: 在信息处理中，特别是实时视频图像处理中，通常都要对实现视频图像进行处理，而这首先必须设计大容量的存储器，同步动态随机存储器SDRAM虽然有价格低廉、容量大等优点，但因SDRAM的控制结构复杂，常用的方法是设计SDRAM通用控制器，这使得很多人不得不放弃使用SDRAM而使用价格昂贵的SRAM。为此，笔者在研究有关文献的基础上，根据具体情况提出一种独特的方法，实现了对SDRAM的控制，并通过利用FPGA控制数据存取的顺序来实现对数字视频图像的旋转，截取、平移等实时处理。-In information processing, especially real-time video image processing usually have to deal with video images, which must first be designed large-capacity memory, synchronous dynamic random access memory SDRAM Although there are low cost, large capacity, etc., but SDRAM control structure of the complex, commonly used method is to design generic SDRAM controller, which makes a lot of people had to abandon the use of SDRAM and the use of expensive SRAM. To this end, the authors examine the literature based on the specific situation in a unique way to realize the control of SDRAM, and control data through the use of FPGA to realize the order of access to digital video image rotation, interception, translation, such as real-time processing. Platform: |
Size: 137216 |
Author:赵明玺 |
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Description: HDTV视频内容创作的繁荣以及在带宽受限的广播信道环境中传送这些视频内容的方法，不断催生新的视频压缩标准和相关视频图像处理设备。-HDTV video content creation and prosperity as well as bandwidth-constrained environment of the broadcasting channel to send video content of these methods, birth of a new video compression standards and associated video image processing equipment. Platform: |
Size: 59392 |
Author:chenqunqin |
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Description: 机器视觉中高速图象处理方法的研究以及FPGA的实现-Machine vision in the high-speed image processing methods, as well as the realization of FPGA Platform: |
Size: 2932736 |
Author:许小姐 |
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Description: 完整的多级滤波图像处理算法，利用FPGA实现，利用硬件结构实现算法能够满足苛刻的实时性要求。-Complete multi-level filtering image processing algorithms using FPGA realization algorithm using hardware structure able to meet the demanding requirements of real-time. Platform: |
Size: 588800 |
Author:朱磊 |
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Description: :针对现场可编程门阵列(FPGA)芯片的特点,研究FPGA中双向端口I/O的设计,同时给
出仿真初始化双向端口I/O的方法。采用这种双向端口的设计方法,选用Xilinx的Spartan2E芯片
设计一个多通道图像信号处理系统。-: For field programmable gate array (FPGA) chip features of FPGA in the bi-directional port I/O design, the simulation is initialized at the same time two-way port I/O method. Using this design method of two-way ports, optional Spartan2E the Xilinx chip to design a multi-channel image signal processing system. Platform: |
Size: 115712 |
Author:zhanyi |
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Description: 这是一个有关实时模拟和数字图像处理的fpga程序-This is a real-time analog and digital image processing procedures for the FPGA Platform: |
Size: 1024 |
Author:cjgqf |
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Description: 图像技术的应用 ：
包括：基于FPGA的图像处理系统；
基于图像特征的景象匹配辅助导航系统中的关键技术研究；
图像导航技术的发展和应用
-Application of imaging technology: including: FPGA-based image processing system images based on image feature matching assisted navigation system in the research of key technologies image navigation technology development and application of Platform: |
Size: 4107264 |
Author:李灵 |
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Description: 基于高速数字信号处理器(DSP) 和大规模现场可编程门阵列( FPGA) ,成功地研制了小型
化、低功耗的实时视频采集、处理和显示平台. 其中的DSP 负责图像处理,其外围的全部数字逻辑功能都集成在一片FPGA 内,包括高速视频流FIFO、同步时序产生与控制、接口逻辑转换和对视频编/ 解码器进行设置的I2 C 控制核等. 通过增大FIFO 位宽、提高传输带宽,降低了占用EMIF 总线的时间 利用数字延迟锁相环逻辑,提高了显示接口时序控制精度. 系统软件由驱动层、管理层和应用层组成,使得硬件管理与算法程序设计彼此分离,并能协同工作. 系统中的图像缓冲区采用了
三帧的配置方案,使得该平台最终具有对PAL/ N TSC 两种制式的全分辨率彩色复合视频信号进行实时采集、显示和处理的能力.-Based on high-speed digital signal processor (DSP) and large-scale field programmable gate array (FPGA), successfully developed a smaller, low-power real-time video capture, processing and display platform. One of the DSP is responsible for image processing, all its external digital logic functions are integrated in a FPGA, including high-speed video streaming FIFO, synchronous sequential generate and control, conversion and interface logic for video encoder/decoder to set up the control of nuclear and other I2 C. through increased FIFO bit width, increase the transmission bandwidth, reducing the time occupied by EMIF bus delay phase-locked loop using digital logic, Platform: |
Size: 546816 |
Author:John |
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Description: 1.an fpga implementation of the image space reconstruction algorithm for hyperspectral imaging analysis
2. fpga implemention of a median filter
3. fpga implementation of digital filters
4.hardware acceleration of edge detection algorithm on fpgas
5.implementation and evaluation of image processing algorithms on reconfigurable architecture using C-based hardware descriptive languages
6. implementing 2D median filter in fpgas
7.视频图像处理与分析的网络资源 Platform: |
Size: 1969152 |
Author:carol |
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Description: 一个基于FPGA和CCD的视觉处理硬件平台项目开发文档-The design is a first step towards a
hardware implementation of the super-resolution algorithms and other multimedia projects.The design presented in this paper may be used as a platform for many multimedia and image processing projects. Platform: |
Size: 483328 |
Author:neversee |
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Description: 应用不同的用户可选择回旋滤波器的图像处理部件。一套PC应用程序将图像档案下载到一个FPGA可访问的存储器阵列。处理过的图像显示在连接的VGA显示屏上。 -Users can choose to apply a different room of the image processing filter components. A set of PC applications will be image files downloaded to a FPGA can access the memory array. Processed image displayed on the VGA display connection. Platform: |
Size: 15406080 |
Author:chenlunhai |
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Description: 关于FPGA图像处理的论文 具有很强的参考性 对于初学者有很好的参考价值-Image processing on FPGA has a strong reference to the papers of a good reference for beginners value Platform: |
Size: 141312 |
Author:gdr |
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Description: FPGA开发板实现图像处理 该例子包含了SOPC和NIOS代码，同时有PDF说明-FPGA development board for image processing of the case includes SOPC and NIOS code, while a PDF description Platform: |
Size: 4486144 |
Author:gdr |
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Description: CCD图像的颜色插值算法研究及其FPGA实现 ，这是一篇论文，里面详细介绍了如何实现图像处理的方法-CCD color image interpolation algorithm and its FPGA implementation, which is a paper, which details how to implement image processing method Platform: |
Size: 4647936 |
Author:文 |
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Description: FPGA驱动OV7620程序代码，SCCB部分由单片机完成，FPGA负责完成图像处理和TFT液晶的显示。经试验，效果不错！-FPGA-driven OV7620 code, SCCB completed in part by the microcontroller, FPGA responsible for the completion of image processing and TFT LCD display. The test, good results! Platform: |
Size: 5714944 |
Author:李瑞全 |
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