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[SCM] vhdl_lcd

Description: 使用C语言与VHDL实现 液晶显示控制器示例使用说明 使用模块有：单片机模块、液晶显示模块。 使用步骤： 1. 打开电源+5V。 2. 信号连接，按下表将1K30信号与实际模块连接好。 3. 1K30板连接好并口线，并将程序加载。 4. 液晶屏上将显示一幅图像。 -use C language and VHDL LCD controller using examples of the use of modules : SCM modules, LCD display modules. Use steps : 1. Turn the power 5V. 2. Signal connectivity, the table below will 1K30 signal with the actual module linking well. 3. 1K30 good parallel plate connections and will be loading procedures. 4. LCD screen will show an image.
Platform: | Size: 39936 | Author: 刘浪 | Hits:

[VHDL-FPGA-Verilog] Exp6-VGA

Description: 通过UART从PC主机读取图片数据，并完成图片在VGA显示器上的显示-through UART from the host PC to read image data, and complete picture of the VGA display on the show
Platform: | Size: 681984 | Author: 萧飒 | Hits:

[2D Graphic] XLIB

Description: 2D图像滤波VHDL代码。 2D图像滤波VHDL代码。-2D image filtering VHDL code. 2D image filtering VHDL code. 2D image filtering VHDL code.
Platform: | Size: 13312 | Author: leisuee | Hits:

[VHDL-FPGA-Verilog] S3Demo

Description: Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simple counter running on it, and when SW0 is in the up position the seven segment decoder will display scan codes from the PS2 port. This demo how ever does not drive the RS-232 port or the memory. This is a simple design done entirely VHDL not microblaze.
Platform: | Size: 731136 | Author: Roy Hsu | Hits:

[File Format] designforvideobasedonSDRAM

Description: 在信息处理中，特别是实时视频图像处理中，通常都要对实现视频图像进行处理，而这首先必须设计大容量的存储器，同步动态随机存储器SDRAM虽然有价格低廉、容量大等优点，但因SDRAM的控制结构复杂，常用的方法是设计SDRAM通用控制器，这使得很多人不得不放弃使用SDRAM而使用价格昂贵的SRAM。为此，笔者在研究有关文献的基础上，根据具体情况提出一种独特的方法，实现了对SDRAM的控制，并通过利用FPGA控制数据存取的顺序来实现对数字视频图像的旋转，截取、平移等实时处理。-In information processing, especially real-time video image processing usually have to deal with video images, which must first be designed large-capacity memory, synchronous dynamic random access memory SDRAM Although there are low cost, large capacity, etc., but SDRAM control structure of the complex, commonly used method is to design generic SDRAM controller, which makes a lot of people had to abandon the use of SDRAM and the use of expensive SRAM. To this end, the authors examine the literature based on the specific situation in a unique way to realize the control of SDRAM, and control data through the use of FPGA to realize the order of access to digital video image rotation, interception, translation, such as real-time processing.
Platform: | Size: 137216 | Author: 赵明玺 | Hits:

[VHDL-FPGA-Verilog] djdcf

Description: 在3D图像处理等对运算要求高的领域，高效除法器已成为处理器内必不可少的部件。在分析除法器设计的泰勒级数展开算法基础上，提出了一种新的除法器设计算法。在满足同样精度的情况下，所实现的三级流水线的除法器，与基于泰勒级数展开算法的除法器相比，面积更小，速度更快。-In 3D image processing and so on, demanding area of computing, efficient divider has become essential components inside the processor. In analyzing the divider design Taylor series expansion algorithm based on a new design algorithm divider. Meet the same accuracy in the cases, the three realize the divider line, and based on the Taylor series expansion algorithm divider compared to a smaller area, faster.
Platform: | Size: 157696 | Author: usbusb01 | Hits:

[Multimedia program] video_compression_systems.tar

Description: 视频、图像压缩代码，内附使用说明，建立相应工程后，将Verilog代码ADD之后就可以编译调试，对于学习图像压缩或熟悉FPGA调试环境的人员会有一定的帮助-Video, image compression code, containing instructions to establish the corresponding work will Verilog code can be compiled after ADD debugging, for learning image compression, or are familiar with FPGA debug environment will help staff
Platform: | Size: 186368 | Author: 王弋妹 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: HDTV视频内容创作的繁荣以及在带宽受限的广播信道环境中传送这些视频内容的方法，不断催生新的视频压缩标准和相关视频图像处理设备。-HDTV video content creation and prosperity as well as bandwidth-constrained environment of the broadcasting channel to send video content of these methods, birth of a new video compression standards and associated video image processing equipment.
Platform: | Size: 59392 | Author: chenqunqin | Hits:

[VHDL-FPGA-Verilog] SRAM-PINGPANG

Description: 超声视频图像需要实时地采集并在处理后在显示器上重建，图像存储器就必须不断地写入数据，同时又要不断地从存储器读出数据送往后端处理和显示[11]。为了满足这种要求，可以在采集系统中设置2片容量一样的SRAM，通过乒乓读写机制来管理。任何时刻，只能有1片SRAM处于写状态，同时也只有1片SRAM处于读状态。工作期间，2片SRAM都处于读写状态轮流转换的过程，转换的过程相同，但是状态错开，从而保证数据能连续地写人和读出祯存.-Real-time ultrasound video images need to collect and deal with the reconstruction after the display, image memory must be continually write data, while at the same time continuously sent from the memory读出数据back-end processing and display [11]. To meet this requirement, you can set up collection system capacity of two different SRAM, read and write through the ping-pong mechanisms to manage. At any time, can only have a SRAM in write state, but also the only one at a time the state of SRAM. Work, two SRAM read and write are in the process of converting a state of rotation, the conversion process of the same, but the state staggered to ensure that data can be continuously written and read out Qizhen depositors.
Platform: | Size: 1024 | Author: smj1980 | Hits:

[Special Effects] multilevel_filter

Description: 完整的多级滤波图像处理算法，利用FPGA实现，利用硬件结构实现算法能够满足苛刻的实时性要求。-Complete multi-level filtering image processing algorithms using FPGA realization algorithm using hardware structure able to meet the demanding requirements of real-time.
Platform: | Size: 588800 | Author: 朱磊 | Hits:

[VHDL-FPGA-Verilog] 2DImageFilterByVHDL

Description: 用VHDL语言编程实现2维图像的滤波算法，简单精辟-VHDL programming language used to achieve 2-D image filtering algorithm, simple brilliant
Platform: | Size: 13312 | Author: 宋雪兵 | Hits:

[VHDL-FPGA-Verilog] husw

Description: 用VHDL语言设计维特比 解码器 是VHDL原代码用ModelSim XE III 6.3c软件实现仿真-Language Design with VHDL Viterbi decoder is the VHDL source code with ModelSim XE III 6.3c software simulation
Platform: | Size: 1024 | Author: hsw0320 | Hits:

[VHDL-FPGA-Verilog] filter

Description: 图像处理技术中3*3模板的滤波电路的VHDL实现.-Image processing technology in the 3* 3 template VHDL implementation of the filter circuit.
Platform: | Size: 292864 | Author: 翁文天 | Hits:

[VHDL-FPGA-Verilog] edge

Description: 图像处理中边缘检测的VHDL源代码,所用的算法是garbor变换-Image processing edge detection of VHDL source code, the algorithms used are garbor transform
Platform: | Size: 384000 | Author: 翁文天 | Hits:

[Software Engineering] medianfilter

Description: 基于vhdl图像处理中值滤波器，关于图像处理的好文章。-VHDL-based image processing median filter, a good deal about graphics article Ha ha
Platform: | Size: 249856 | Author: 张海风 | Hits:

[VHDL-FPGA-Verilog] VGA

Description: VGA彩色信号控制器设计：用VHDL语言编写程序，重点完成三个功能： 1.棋盘格图案显示： 用三基色原理在CRT显示器上显示由横竖八彩条重叠构成的棋盘格图案； 2.在显示器上依次显示0~9十个数字： 每个数字不同颜色，每个显示大约0.4秒，循环显示； 3.显示动画效果： 将静态图像以高频率显示，造成动画效果，最终动态显示OVER结束。-VGA color signal controller design: using VHDL programming language, focusing on the completion of three functions: 1. Chessboard grid pattern shows that: The principle of three-color display on the CRT display by eight color横竖overlapping grid consisting of checkerboard patterns 2. followed by the display on display 0 ~ 9 10 figure: Each figure in different colors, each show around 0.4 seconds, circular display 3. show animation effects: static image to display a high frequency, resulting in animation effects, dynamic display finally OVER The End .
Platform: | Size: 186368 | Author: 刘峰 | Hits:

[Special Effects] hdl

Description: 图像数据的采集和处理，并通过串口发送到PC界面进行整理。-Image data acquisition and processing, and sent to the PC through the serial interface to collate.
Platform: | Size: 6144 | Author: 魏常伟 | Hits:

[Graph program] ImageProcessing

Description: 应用不同的用户可选择回旋滤波器的图像处理部件。一套PC应用程序将图像档案下载到一个FPGA可访问的存储器阵列。处理过的图像显示在连接的VGA显示屏上。 -Users can choose to apply a different room of the image processing filter components. A set of PC applications will be image files downloaded to a FPGA can access the memory array. Processed image displayed on the VGA display connection.
Platform: | Size: 15406080 | Author: chenlunhai | Hits:

[Other] UBS_24Jun09

Description: this document is about image processing in vhdl
Platform: | Size: 5120 | Author: Manikandan | Hits:

[Compress-Decompress algrithms] DWT

Description: deals with implementation of DWT
Platform: | Size: 612352 | Author: ibbu | Hits:
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