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[Other resource] USB 2.0 IP Core

Description: USB20的IP CORE,可以直接用在SOPC下，自动完成全部的枚举，只需修改枚举参数即可！-USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
Platform: | Size: 181283 | Author: 林风 | Hits:

[File Operate] 8-bit-mcu-ip-core-design-and-verification

Description: 万方数据库中载的，关于IP核设计和验证方面的论文-popular database containing, for the IP core design and certification papers
Platform: | Size: 4539132 | Author: 王嘉 | Hits:

[Other resource] PS2-IP-CORE-VHDL

Description: 一个PS2 IP CORE(VHDL) for FPGA
Platform: | Size: 27393 | Author: nanotalk | Hits:

[Other resource] USB 1.1 IP-CORE和设计范例 VHDL源代码

Description: USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
Platform: | Size: 426278 | Author: ken | Hits:

[Other resource] IP core

Description: VHDL ip core的设计，软核的设计方法-VHDL core of the design, soft-core design
Platform: | Size: 414992 | Author: 周贤 | Hits:

[SourceCode] turbo码 IP core

Description: turbo码 IP core, VHDL编写，Altera公司的，用于信道编码中turbo码的译码
Platform: | Size: 155967 | Author: zhhzhhj@163.com | Hits:

[VHDL-FPGA-Verilog] USB 1.1 IP-CORE和设计范例 VHDL源代码

Description: USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
Platform: | Size: 425984 | Author: ken | Hits:

[VHDL-FPGA-Verilog] IP core

Description: VHDL ip core的设计，软核的设计方法-VHDL core of the design, soft-core design
Platform: | Size: 414720 | Author: 周贤 | Hits:

[VHDL-FPGA-Verilog] FFT变换的IP核的源代码 VHDL~

Description: FFT变换的IP核的源代码 VHDL~-FFT IP core of the source code for VHDL ~
Platform: | Size: 31744 | Author: 陈旭 | Hits:

[VHDL-FPGA-Verilog] 发布15个Altera的IP的源码

Description: ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.
Platform: | Size: 49152 | Author: 汪旭 | Hits:

[VHDL-FPGA-Verilog] MC8051 IP Core

Description: 8051的IP软核，使用硬件描述语言编写，可以下载到FPGA/CPLD中作为片上系统的处理器-8051 IP soft-core, the use of hardware description language can be downloaded to the FPGA/CPLD as a system-on-chip processor
Platform: | Size: 532480 | Author: zy | Hits:

[VHDL-FPGA-Verilog] USB 2.0 IP Core

Description: USB20的IP CORE,可以直接用在SOPC下，自动完成全部的枚举，只需修改枚举参数即可！-USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
Platform: | Size: 181248 | Author: 林风 | Hits:

[File Format] 8-bit-mcu-ip-core-design-and-verification

Description: 万方数据库中载的，关于IP核设计和验证方面的论文-popular database containing, for the IP core design and certification papers
Platform: | Size: 4538368 | Author: 王嘉 | Hits:

[VHDL-FPGA-Verilog] PS2-IP-CORE-VHDL

Description: 一个PS2 IP CORE(VHDL) for FPGA-A PS2 IP CORE (VHDL) for FPGA
Platform: | Size: 26624 | Author: nanotalk | Hits:

[VHDL-FPGA-Verilog] 15-IP-core

Description: 15个免费的IP核 IP核源代码 -15 IP cores
Platform: | Size: 4579328 | Author: chris | Hits:

[File Format] QuartusII-free-of-charge-to-use-IP-Core

Description: 本文详细的介绍了QuartusII中免费IP核的使用方法-This paper introduces QuartusII free of charge to use IP Core
Platform: | Size: 633856 | Author: 李洲 | Hits:

[VHDL-FPGA-Verilog] ethernet10-100M-IP-core

Description: 以太网10-100M IP核Verilog源码，可综合-Ethernet 10-100M IP core Verilog source code can be integrated
Platform: | Size: 740352 | Author: owen | Hits:

[USB develop] USB-1.1-IP-CORE-VHDL

Description: USB1.1标准接口的IP核的实现和其设计实现的源码范例VHDL-USB1.1 standard interface IP core implementations and examples of their design and implementation of the VHDL source code
Platform: | Size: 425984 | Author: sxhfjgl010 | Hits:

[VHDL-FPGA-Verilog] vhdl-fft-core

Description: FFT ip core，fft信号处理模块， VHDL语言编写-FFT ip core
Platform: | Size: 390144 | Author: xionghailiang | Hits:

[Documents] pg137-axi-usb2-device(xilinx USB ip core)

Description: xilinx USB ip 核使用说明文档，接口完全和usb3320接口一致(Xilinx USB IP core usage instructions document, the interface is completely consistent with the usb3320 interface)
Platform: | Size: 716800 | Author: 黄国锋 | Hits:
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