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[Other resource] 发布15个Altera的IP的源码

Description: ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.
Platform: | Size: 49346 | Author: 汪旭 | Hits:

[SourceCode] turbo码 IP core

Description: turbo码 IP core, VHDL编写，Altera公司的，用于信道编码中turbo码的译码
Platform: | Size: 155967 | Author: zhhzhhj@163.com | Hits:

[SourceCode] Altera IP Core

Description: 15 Altera IP Core
Platform: | Size: 49033 | Author: mayli8 | Hits:

[VHDL-FPGA-Verilog] tiny16cpu_maxII

Description: 这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核，文档齐全-this is the ALtera devoted second-generation PLD MAXII on the 16-bit microprocessor IP core, complete documentation
Platform: | Size: 240640 | Author: 李无志 | Hits:

[VHDL-FPGA-Verilog] 发布15个Altera的IP的源码

Description: ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.
Platform: | Size: 49152 | Author: 汪旭 | Hits:

[ARM-PowerPC-ColdFire-MIPS] Altera的IP源码8237

Description: 名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写，能被keilC51支持-renowned name of the company Synopsys 8051IP Core VHDL language, support can be keilC51
Platform: | Size: 207872 | Author: 上面的 | Hits:

[VHDL-FPGA-Verilog] altera_lcd_controller

Description: quartus II-sopc builder avalon总线LCD控制IPCORE-quartus II-sopc builder avalon Bus LCD controller IP CORE
Platform: | Size: 26624 | Author: 张建 | Hits:

[Other] ug_altpll

Description: altera公司的IP core，对于初学硬件描述语言，想要利用quartus软件自带的锁相环电路库函数实现自己想要的功能有些帮助-altera the IP core, for hardware description language learning, quartus want to use the software to bring their own PLL circuit to achieve the function they want to help some of the functions
Platform: | Size: 715776 | Author: 林德 | Hits:

[VHDL-FPGA-Verilog] DM9000A

Description: Verilog 编写的网卡DM9000A的IP核，altera公司寄的DE2系统中的源程序核-Verilog prepared DM9000A the IP core network card, altera company sent DE2 System source of nuclear
Platform: | Size: 16384 | Author: zhyy | Hits:

[VHDL-FPGA-Verilog] CF_card_base_on_NiosII

Description: 基于NIOS的CF卡应用(包括了软件和硬件),ALTERA的IP库中只提供了底层的硬件寄存器描述头文件.这是个基于IP核HAL的软件,以及相应的硬件设计示例.-NIOS based on the CF card applications (including the software and hardware), ALTERA the IP library provides only the bottom of the first document describes the hardware registers. This is a HAL-based IP core of the software, hardware design and the corresponding sample.
Platform: | Size: 1398784 | Author: 沈阳 | Hits:

[VHDL-FPGA-Verilog] Altera_8051_IPcore_v1.2

Description: Alera 的8051 IP core的示例文件5个-Alera the 8051 IP core of the sample file 5
Platform: | Size: 1884160 | Author: zheng | Hits:

[VHDL-FPGA-Verilog] FFT_verilog

Description: verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
Platform: | Size: 618496 | Author: culun | Hits:

[VHDL-FPGA-Verilog] altera_up_avalon_sd_card_interface

Description: 基于VHDL的SD卡IP核，Altera公司推出的大学计划！最新版本9.0-VHDL-based IP core of the SD card, Altera' s university program launched! The latest version 9.0
Platform: | Size: 264192 | Author: 兔子 | Hits:

[Other] altera_nand_controller

Description: Altera合作伙伴Eureka Technology.和Cast Inc.为Altera FPGA芯片定制的Nand flash controller IP core-Altera partner Eureka Technology. And the Cast Inc. For the Altera FPGA chip custom Nand flash controller IP core
Platform: | Size: 296960 | Author: Trevor | Hits:

[VHDL-FPGA-Verilog] altera_up_avalon_sd_card_interface_91

Description: 修改后的Altera大学计划IP Core，可用于QII9.1及9.1SP1-Revised Altera University Program IP Core, can be used for QII9.1 and 9.1SP1
Platform: | Size: 319488 | Author: Royal Wang | Hits:

[VHDL-FPGA-Verilog] fifoed_avalon_uart9.1_applicaton

Description: 用于Altera Avalon总线的、具有FIFO缓冲的Uart数据串口IP核以及应用于Nios2的、真正可运行的、容易移植的C代码。-Fifoed avalon uart IP core and C code for the IP core.
Platform: | Size: 205824 | Author: xmar | Hits:

[VHDL-FPGA-Verilog] cordic

Description: altera cordic ip core, 包含文档，完整设计，以及测试向量-altera coedic ip core, including the document, whole design, and the testbench.
Platform: | Size: 896000 | Author: panzhijian | Hits:

[VHDL-FPGA-Verilog] m-mtip-10_100_1000_ethermac

Description: 10/100 0M以太网MAC解决方案，是IP核的相关说明，利用ALTERA的FPGA设计，QUARTUS软件为开发平台。-10/100/1000M Ethernet MAC solution is the IP core instructions, using ALTERA' s FPGA design, QUARTUS software development platform.
Platform: | Size: 43008 | Author: 天一生水 | Hits:

[VHDL-FPGA-Verilog] fft_ug

Description: altera的FFT IP核的用户手册，介绍了如何使用ALTERA IP核生成FFT核，如何设置参数并讲述了如何仿真，适用于通信方面的FPGA设计工程师，学生。-altera' s FFT IP core user manual describes how to use the ALTERA IP core generated FFT core, how to set parameters and describes how to simulate, for communications, FPGA design engineers, students.
Platform: | Size: 1035264 | Author: zhangdong | Hits:

[Other] Altera-SDRAM_controller-IP-CORE

Description: Altera的SDRAM IP核代码，支持源码创作-Altera s SDRAM IP core code to support the creation of source
Platform: | Size: 3500032 | Author: chen600 | Hits:
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