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Description: VC下mobileIP的模拟实现，新颖,需要多台主机:包含四个程序,foreignagent,homeagent,mobileip-sender,mobileip-receiver-VC mobileIP the simulation, which are needed Host : contains four procedures, foreignagent, homeagent, mobileip-sender. mobileip-receiver
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Size: 126252 |
Author: 徐兴 |
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Description: TCP/IP通讯模拟程序的客户端程序.需要和服务端一起使用.-TCP/IP communications simulation procedures client. End needs and services are used together.
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Size: 11264 |
Author: 王波 |
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Description: 我自己写的一个tcp/ip的代码，很短，用的是vc来做模拟调试的，具体的运行是要在mcs51单片机上的，只有一个端口。具体请大家看程序吧！-I wrote it myself a tcp/ip code, in a very short, it was vc do simulation testing, the specific operation is to mcs51 MCU, only one port. Please refer to specific procedures!
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Size: 161792 |
Author: 马佶 |
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Description: 虚拟发包器 模拟ip发送封包-contract for virtual simulation ip packets sent
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Size: 27648 |
Author: 赵越 |
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Description: 专门为65XX系列芯片设计的变异调试环境的源代码，自带代码加色系统，以及模拟调试环境-65XX series dedicated to the variation of chip design debugging environment of source code, code plus its own color system, simulation and debugging environment
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Size: 661504 |
Author: JIPU_PHIL |
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Description: 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-complete with verilog language development USB2.0 IP source code, including documentation, Simulation documents
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Size: 206848 |
Author: 张清平 |
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Description: 51单片机+rtl8019的tcp/ip协议栈,仿真环境proteus.-51 microcontroller rtl8019 the tcp/ip protocol stack, simulation environment proteus.
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Size: 100352 |
Author: bingdu |
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Description: 关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.-FPGA pipelined designs on paper This work investigates the use of very deep pipelines forimplementing circuits in FPGAs, where each pipelinestage is limited to a single FPGA logic element (LE). Thearchitecture and VHDL design of a parameterized integerarray multiplier is presented and also an IEEE 754compliant 32-bit floating-point multiplier. We show how towrite VHDL cells that implement such approach, and howthe array multiplier architecture was adapted. Synthesisand simulation were performed for Altera Apex20KEdevices, although the VHDL code should be portable toother devices. For this family, a 16 bit integer multiplierachieves a frequency of 266MHz, while the floating pointunit reaches 235MHz, performing 235 MFLOPS in anFPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and otherconsiderations to apply the technique in real designs arealso addressed.
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Size: 179200 |
Author: 李中伟 |
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Description: jsp网页，开发环境Eclipse3.2+Tomcat5.0+Myeclipse开发的RFID射频识别模拟系统，模拟了酒类产品从生产，存储，销售，到防伪识别一系列过程-jsp website Development Environment Eclipse3.2 Tomcat5.0 Myeclipse development of the RFID- Simulation frequency identification system to simulate the alcoholic products from the production, storage, sale, a series of security identification process
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Size: 3944448 |
Author: 河南 |
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Description: VC下mobileIP的模拟实现，新颖,需要多台主机:包含四个程序,foreignagent,homeagent,mobileip-sender,mobileip-receiver-VC mobileIP the simulation, which are needed Host : contains four procedures, foreignagent, homeagent, mobileip-sender. mobileip-receiver
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Size: 125952 |
Author: 徐兴 |
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Description: 使用VC模拟实现linux下irout命令功能。访问某一网址并写出中间路由IP。-The use of VC simulation irout the command function under linux. Access a URL and write intermediate routing IP.
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Size: 1479680 |
Author: 张娜 |
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Description: 电赛一等奖作品：音频信号分析仪的FPGA源码，VHDL编写，Quartus7.1综合，ModelSim6.2g se仿真，应用了opencores.org上的开源FFT IP核，加入了8051总线接口和ram-Xinhua Cup first prize works: audio signal analyzer FPGA source, VHDL prepared, Quartus7.1 integrated, ModelSim6.2g se simulation, application of open source opencores.org on FFT IP core, joined the 8051 bus interface and ram
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Size: 4933632 |
Author: 李星 |
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Description: 本文主要论述了在OPNET中进行移动IP仿真的模块设计及实现方法，分析了仿真的性能。具体讲述了在OPNET中如何进行移动IP的仿真-This article focuses on the OPNET simulation in mobile IP module design and implementation method of analysis of simulation performance. Specific about how to proceed in OPNET in Mobile IP simulation
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Size: 123904 |
Author: guoxu |
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Description: TCP/IP协议栈FHMIP1.3.1.rar协议源代码，仿真系列-TCP/IP protocol stack source code FHMIP1.3.1.rar agreement, simulation series
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Size: 3030016 |
Author: wangcm |
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Description: Mobile IP是NS中由SUN公司开发的无线--有线模拟模块,它比CMU/Monarch引入的无线模块功能更为强大。IETF提出Mobile IP协议以来，经过各方面的共同努力Mobile IP协议已经日趋完善，相应的技术也逐渐走向成熟。Mobile IP使得人们不再拘泥于时间和空间，可以随时随地的与Internet上的其他网络节点进行通信，不会因为位置的变化而造成通信中断。-Mobile IP is the NS developed by SUN wireless cable simulation module, which more than CMU/Monarch introduced a more powerful wireless module. IETF has proposed Mobile IP protocol, through the joint efforts of all aspects of Mobile IP protocol has become more perfect, the corresponding technology is gradually maturing. Mobile IP makes it no longer rigidly adhere to time and space, anytime, anywhere with the Internet, other network nodes to communicate, and does not change the location of communication interruption caused.
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Size: 784384 |
Author: Eclipse |
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Description: 模拟银行ATM提款机系统（单线程），我的RAD项目，得到了刘岩博士的大力支持,目前完成了单线程的程序结构，开发平台VC6.0,运行平台DOS7.0。程序是C/S结构，由服务端和客户端程序构成，还有一个配置程序来定义文件和IP，程序还实现了冲帐功能。我还在思考如何设计多线程的设计，特公布了原码，望大家帮我看看。-Simulation of ATM bank teller machine system (single-threaded), my RAD project has been the strong support of Dr. Liu Yan, the current procedures for the completion of the single-threaded structure, and development platform VC6.0, running platform DOS7.0. Process is C/S structure, by the service client and the client program consists of a procedure to define the configuration files and IP, the procedures also realize the strike a balance function. I am still thinking how to design multi-threaded design, special publication of the original code, hope to see everyone help me.
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Size: 10240 |
Author: 做自己的偶像 |
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Description: 层次化移动IP仿真，适用于NS2 2.31+linux环境-Hierarchical Mobile IP simulation, applicable to NS2 2.31+ Linux environment
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Size: 1257472 |
Author: lee |
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Description: voice over ip patch for ns2 simulation
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Size: 417792 |
Author: manoj |
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Description: linux平台下ns-2网络仿真软件下移动IP仿真-ns-2 mobile ip simulation
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Size: 5120 |
Author: javin |
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Description: 自己总结的Altera_LVDS的IP核的设计及仿真分析，非常使用，已在实际工程中应用到(Their summary of the Altera_LVDS IP kernel design and simulation analysis, very use, has been applied in practical engineering)
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Size: 3184640 |
Author: 何波波
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