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Description: IQ信号发生器，希望对大家有些帮助-IQ signal generator, in the hope that some U.S. help
Platform: |
Size: 6144 |
Author: 屈开 |
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Description: 该程序完成QPSK从比特到符号的映射，其中XY_in_en为输入的比特使能信号，XY_data为IQ合路后的输入比特数据。I_out和Q_out为映射后的符号对。-Completion of the program from the QPSK mapping bits to symbols, in which input bits XY_in_en enable signal, XY_data for IQ Combiner bit after the data input. I_out and after Q_out for mapping symbols right.
Platform: |
Size: 1024 |
Author: huangdecheng |
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Description: calculating of iD & iQ, with ia & ib in 2 s complement
Platform: |
Size: 1024 |
Author: T. H. Sutikno |
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Description: IQ correction module in VHDL
Platform: |
Size: 9216 |
Author: spydeeps |
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