Welcome![Sign In][Sign Up]
Location:
Search - ir vhdl

Search list

[OtherMY_CTL

Description: -- Simple Robot Control Program -------------------------------------------------------------------------- -- Left is left IR sensor - 1=object to left -- Right is rigth IR sensor - 1=object to right -- Lmotor_dir 1=forward 0=reverse -- Rmotor_dir 1=forward 0=reverse -- Lmotor_speed 111=fast 000=slow -- Rmotor_speed 111=fast 000=slow --- Simple Robot Control Program -------------------------------------------------------------------------- -- Left is left IR sensor- 1=object to left -- Right is rigth IR sensor- 1=object to right -- Lmotor_dir 1=forward 0=reverse -- Rmotor_dir 1=forward 0=reverse -- Lmotor_speed 111=fast 000=slow -- Rmotor_speed 111=fast 000=slow
Platform: | Size: 1024 | Author: yu | Hits:

[VHDL-FPGA-VerilogIR

Description: 红外线接收: 使用任何遥控器(电视、空调等),对准开发板的红外线接收管,按下遥控器的任何按钮,LED0 会按照红外线码进行闪烁。 -Infrared receiver: the use of any remote control (TV, air conditioning, etc.), targeting the development board infrared receiver tube, press any button on the remote control, LED0 will be in accordance with the infrared codes flashing.
Platform: | Size: 78848 | Author: panda | Hits:

[VHDL-FPGA-Verilogcpu

Description: 设计一个简化的处理器(字长8位),并使其与内存MEM连接,协调工作。用VHDL以RTL风格描述。该处理器当前执行的指令存放在指令寄存器IR中。处理器的指令仅算逻指令和访问内存指令)。-Design a simplified processor (8-bit word length), and connect it with the memory MEM, and coordination. Described with VHDL in RTL style. The processor is currently executing instruction stored in the instruction register IR. Arithmetic Logic processor instructions and instructions only access memory instructions).
Platform: | Size: 4740096 | Author: jinxf | Hits:

[VHDL-FPGA-Verilogrc5

Description: RC5 Decoder VHDL Source Code Ir Remocon Code Decoder
Platform: | Size: 4096 | Author: damorzio | Hits:

[VHDL-FPGA-VerilogCPU-with-VHDL-16-32

Description: 在quartus中运行的32位指令集的16位CPU程序,模块化设计,包括MBR, BR, MR, ACC, MAR, PC, IR, CU, ROM, RAM, ALU等模块-In the the quartus run 32 16-bit CPU instruction set procedures, modular design, including the MBR, BR, MR, the ACC, the MAR, the PC, the IR CU, the ROM, RAM, ALU and other modules
Platform: | Size: 1651712 | Author: | Hits:

[VHDL-FPGA-Verilogvhdl-pipeline-mips0

Description: MIPS CPU WITH PIPELINE procesador MIPS-FZA -- Autor: mahdi ahmadi -- Email: mahdi@fza.ir -- mahdifza@yahoo.com -- -- Version: 1.0
Platform: | Size: 23552 | Author: mahdi | Hits:

[VHDL-FPGA-Verilogir

Description: 在DE2-115板子上的IR接受器的控制器(给予VHDL语言)!已在板子上调试通过,可以直接使用!-DE2-115 board IR receiver controller (given VHDL language)! Through debugging on the board, can be used directly!
Platform: | Size: 5895168 | Author: 夏明 | Hits:

[VHDL-FPGA-Verilogvhdl__example_fza.ir

Description: useful vhdl example contain adder-mux-counter-ram-shifter-rom-flipflop-useful vhdl example contain adder-mux-counter-ram-shifter-rom-flipflop...
Platform: | Size: 22528 | Author: mahdi | Hits:

CodeBus www.codebus.net