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[VHDL-FPGA-VerilogISP1362

Description: Verilog 编写的ISP1362的控制器IP核,altera公司DE2系统中的源程序-Verilog prepared ISP1362 controller IP core, altera company source DE2 System
Platform: | Size: 18432 | Author: zhyy | Hits:

[VHDL-FPGA-VerilogISP1362

Description: source code for ISP 1362
Platform: | Size: 18432 | Author: bibin | Hits:

[USB developisp1301

Description: usb on the go之isp1301芯片说明文档 主要包含了isp1301 概述 整体特性介绍 应用 电路图 引脚图 功能详细描述 工作模式介绍 USB的发送与接受 内部寄存器介绍 时钟唤醒机制 I2C总线控制 静态特性 动态特性 等等.-usb on the go the isp1301 chip documentation isp1301 contains an overview of the main characteristics of the overall plan to introduce application of circuit-pin mode function to introduce a detailed description of the sending and acceptance of USB internal register clock wake-up mechanism introduced I2C bus control and so on static characteristics of the dynamic characteristics.
Platform: | Size: 178176 | Author: lingkun | Hits:

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