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Description: 本程序使用vhdl编写的jtag接口实现程序,其中有些功能未能实现,希望有人能够帮忙完善!-vhdl the procedures used to prepare the jtag interface procedures, which some of them did not materialize, hope someone can help perfect!
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Size: 86016 |
Author: 马斌 |
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Description: JTAG仿真器CPLD -JTAG Emulator CPLD
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Size: 345088 |
Author: 李秉 |
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Description: JTAG CPLD实现源代码,比用简单并口调试器快5倍以上。
以前总觉得简单的并口jtag板速度太慢,特别是调试bootloader的时候,简直难以忍受。最近没什么事情,于是补习了几天vhdl,用cpld实现了一个快速的jtag转换板。cpld用epm7128stc100-15,晶振20兆,tck频率5兆。用sjf2410作测试,以前写50k的文件用时5分钟,现在则是50秒左右。tck的频率还可以加倍,但是不太稳定,而且速度的瓶颈已经不在tck这里,而在通讯上面了。
-JTAG CPLD source code than the simple parallel debugger five times faster. Before feel simple parallel port JTAG board is too slow, especially when debugging Bootloader, simply intolerable. No matter recently, so VHDL tutorial for a few days, with cpld to achieve a rapid conversion of JTAG board. Cpld with epm7128stc100-15, 20 Katherine crystal, the frequency tck 5 trillion. Sjf2410 used for testing, before the document was made with 50k at 5 minutes, now it is about 50 seconds. Tck frequencies can also doubled, but not too stable, but the rate has not tck bottleneck here, and in the above communications.
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Size: 2048 |
Author: 李伟 |
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Description: 嵌入式系统中的JTAG接口编程技术.pdf
C陷阱与缺陷.pdf-Embedded System of JTAG interface programming technology. Pdf C traps and deficiencies. Pdf
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Size: 5037056 |
Author: sunny |
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Description: USB下载线的vhdl程序,实现USB协议和JTAG接口的转换,用状态机实现的
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Size: 2048 |
Author: 一王 |
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Description:
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Size: 338944 |
Author: dc |
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Description: jtag技术规范,以及标准的并口jtag下载电缆的资料-JTAG technical specifications, as well as the standard parallel port JTAG download cable data
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Size: 12288 |
Author: 张恒 |
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Description: ARM7系统IP核的VHDL语言源代码,需要的开发环境是QUARTUS II 6.0。-ARM7 System IP Core VHDL language source code, the need for the development environment is QUARTUS II 6.0.
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Size: 666624 |
Author: 周华茂 |
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Description: Serial/Parallel converter, interfacing JTAG chain with FTDI FT245BM
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Size: 2048 |
Author: yuxiaoqin |
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Description: Flex chip implementation
File: UP2FLEX
JTAG jumper settings: down, down, up, up
Input:
Reset - FLEX_PB1
Input n - FLEX_SW switches 1 to 8
Output:
Countdown - two 7-segment LEDs.
Done light - decimal point on Digit1.
Operation:
Setup the binary input n number.
Press the Reset switch.
See the countdown from n down to 0 on the 7-segment LEDs.
Done light lit when program terminates.-Flex chip implementation
File: UP2FLEX
JTAG jumper settings: down, down, up, up
Input:
Reset- FLEX_PB1
Input n- FLEX_SW switches 1 to 8
Output:
Countdown- two 7-segment LEDs.
Done light- decimal point on Digit1.
Operation:
Setup the binary input n number.
Press the Reset switch.
See the countdown from n down to 0 on the 7-segment LEDs.
Done light lit when program terminates.
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Size: 107520 |
Author: james |
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Description: ARM7ARM9的jtag仿真器,用于JTAG在线仿真-ARM7ARM9 the JTAG emulator
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Size: 792576 |
Author: 周谦 |
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Description: JTAG TAP controller verilog source code
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Size: 5120 |
Author: kdlee |
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Description: 包含两的关于Virtual JTAG的应用实例,可以为Virtual JTAG操作提供借鉴。-Contains two Virtual JTAG on the application, can provide reference Virtual JTAG operation.
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Size: 311296 |
Author: youthl |
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Description: 包含两的关于Virtual JTAG的应用实例,可以为Virtual JTAG操作提供借鉴。-Contains two Virtual JTAG on the application, can provide reference Virtual JTAG operation.
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Size: 143360 |
Author: youthl |
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Description: actel FPGA JTAG电路 周立功开发-actel JTAG
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Size: 32768 |
Author: pigeoon |
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Description: JTAG Tools is a software package which enables working with JTAG-aware (IEEE 1149.1) hardware devices (parts) and boards through JTAG adapter.
This package has open and modular architecture with ability to write miscellaneous extensions (like board testers, flash memory programmers, and so on).
JTAG Tools package is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for JTAG Tools. Please read COPYING file for more info. -JTAG Tools is a software package which enables working with JTAG-aware (IEEE 1149.1) hardware devices (parts) and boards through JTAG adapter.
This package has open and modular architecture with ability to write miscellaneous extensions (like board testers, flash memory programmers, and so on).
JTAG Tools package is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for JTAG Tools. Please read COPYING file for more info.
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Size: 957440 |
Author: asdf |
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Description: 详细介绍FPGA的JTAG原理和应用,主要设计Xilinx的FPGA的JTAG设计和下载方式-XilinxFPGAJTAG
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Size: 3965952 |
Author: lxb |
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Description: JTAG Verilog source code
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Size: 13312 |
Author: austin |
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Description: Fpga开发应用,jtag方面的源代码,VHDL-Fpga development and application, jtag in the source code, VHDL
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Size: 3072 |
Author: 王刚 |
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Description: verilog jtag源码及原理,还有debug模块。边界扫描等-verilog jtag source and principle, as well as debug module. Boundary-Scan, etc.
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Size: 10044416 |
Author: jack |
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